1 //===-- MipsSubtarget.cpp - Mips Subtarget Information --------------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file implements the Mips specific subclass of TargetSubtargetInfo. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #include "MipsSubtarget.h" 15 #include "Mips.h" 16 #include "MipsRegisterInfo.h" 17 #include "llvm/Support/TargetRegistry.h" 18 19 #define GET_SUBTARGETINFO_TARGET_DESC 20 #define GET_SUBTARGETINFO_CTOR 21 #include "MipsGenSubtargetInfo.inc" 22 23 using namespace llvm; 24 25 void MipsSubtarget::anchor() { } 26 27 MipsSubtarget::MipsSubtarget(const std::string &TT, const std::string &CPU, 28 const std::string &FS, bool little) : 29 MipsGenSubtargetInfo(TT, CPU, FS), 30 MipsArchVersion(Mips32), MipsABI(UnknownABI), IsLittle(little), 31 IsSingleFloat(false), IsFP64bit(false), IsGP64bit(false), HasVFPU(false), 32 IsLinux(true), HasSEInReg(false), HasCondMov(false), HasMulDivAdd(false), 33 HasMinMax(false), HasSwap(false), HasBitCount(false) 34 { 35 std::string CPUName = CPU; 36 if (CPUName.empty()) 37 CPUName = "mips32"; 38 39 // Parse features string. 40 ParseSubtargetFeatures(CPUName, FS); 41 42 // Initialize scheduling itinerary for the specified CPU. 43 InstrItins = getInstrItineraryForCPU(CPUName); 44 45 // Set MipsABI if it hasn't been set yet. 46 if (MipsABI == UnknownABI) 47 MipsABI = hasMips64() ? N64 : O32; 48 49 // Check if Architecture and ABI are compatible. 50 assert(((!hasMips64() && (isABI_O32() || isABI_EABI())) || 51 (hasMips64() && (isABI_N32() || isABI_N64()))) && 52 "Invalid Arch & ABI pair."); 53 54 // Is the target system Linux ? 55 if (TT.find("linux") == std::string::npos) 56 IsLinux = false; 57 } 58 59 bool 60 MipsSubtarget::enablePostRAScheduler(CodeGenOpt::Level OptLevel, 61 TargetSubtargetInfo::AntiDepBreakMode& Mode, 62 RegClassVector& CriticalPathRCs) const { 63 Mode = TargetSubtargetInfo::ANTIDEP_CRITICAL; 64 CriticalPathRCs.clear(); 65 CriticalPathRCs.push_back(hasMips64() ? 66 &Mips::CPU64RegsRegClass : &Mips::CPURegsRegClass); 67 return OptLevel >= CodeGenOpt::Aggressive; 68 } 69
