| /dalvik/vm/compiler/template/ia32/ |
| header.S | 21 #define rPC %esi
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| /dalvik/vm/compiler/template/armv5te/ |
| header.S | 64 r4 rPC interpreted program counter, used for fetching instructions
74 #define rPC r4
89 str rPC, [rFP, #(-sizeofStackSaveArea + offStackSaveArea_currentPc)]
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| /dalvik/vm/compiler/template/out/ |
| CompilerTemplateAsm-ia32.S | 28 #define rPC %esi
64 * will be located at *rp. When called from static code, rPC is
71 * we got here via chaining. Otherwise, we'll assume rPC is valid.
91 movl %eax,rPC
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| CompilerTemplateAsm-armv5te.S | 71 r4 rPC interpreted program counter, used for fetching instructions
81 #define rPC r4
96 str rPC, [rFP, #(-sizeofStackSaveArea + offStackSaveArea_currentPc)]
180 ldr rPC, [r0, #offStackSaveArea_savedPc] @ rPC<- saveArea->savedPc
201 add rPC, rPC, #6 @ publish new rPC (advance 6 bytes)
215 stmia rSELF, {rPC, rFP} @ SAVE_PC_FP_TO_SELF()
227 * into rPC then jump to dvmJitToInterpNoChain to dispatch th
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| CompilerTemplateAsm-armv5te-vfp.S | 71 r4 rPC interpreted program counter, used for fetching instructions
81 #define rPC r4
96 str rPC, [rFP, #(-sizeofStackSaveArea + offStackSaveArea_currentPc)]
180 ldr rPC, [r0, #offStackSaveArea_savedPc] @ rPC<- saveArea->savedPc
201 add rPC, rPC, #6 @ publish new rPC (advance 6 bytes)
215 stmia rSELF, {rPC, rFP} @ SAVE_PC_FP_TO_SELF()
227 * into rPC then jump to dvmJitToInterpNoChain to dispatch th
[all...] |
| CompilerTemplateAsm-armv7-a-neon.S | 71 r4 rPC interpreted program counter, used for fetching instructions
81 #define rPC r4
96 str rPC, [rFP, #(-sizeofStackSaveArea + offStackSaveArea_currentPc)]
180 ldr rPC, [r0, #offStackSaveArea_savedPc] @ rPC<- saveArea->savedPc
201 add rPC, rPC, #6 @ publish new rPC (advance 6 bytes)
215 stmia rSELF, {rPC, rFP} @ SAVE_PC_FP_TO_SELF()
227 * into rPC then jump to dvmJitToInterpNoChain to dispatch th
[all...] |
| CompilerTemplateAsm-armv7-a.S | 71 r4 rPC interpreted program counter, used for fetching instructions
81 #define rPC r4
96 str rPC, [rFP, #(-sizeofStackSaveArea + offStackSaveArea_currentPc)]
180 ldr rPC, [r0, #offStackSaveArea_savedPc] @ rPC<- saveArea->savedPc
201 add rPC, rPC, #6 @ publish new rPC (advance 6 bytes)
215 stmia rSELF, {rPC, rFP} @ SAVE_PC_FP_TO_SELF()
227 * into rPC then jump to dvmJitToInterpNoChain to dispatch th
[all...] |
| /dalvik/vm/mterp/x86-atom/ |
| header.S | 44 * %esi rPC interpreted program counter, used for fetching
66 #define rPC %esi
90 movl rPC, offGlue_pc(\_reg)
100 movl offGlue_pc(rFP), rPC
115 movl rPC, (-sizeofStackSaveArea + offStackSaveArea_currentPc)(rFP)
144 * Fetch the next instruction from rPC into rINST. Does not advance rPC.
148 movzwl (rPC), rINST
152 * Fetch the next instruction from the specified offset. Advances rPC
161 add $$(\_count*2), rPC
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| /dalvik/vm/mterp/armv5te/ |
| header.S | 57 r4 rPC interpreted program counter, used for fetching instructions
69 #define rPC r4
76 #define LOAD_PC_FROM_SELF() ldr rPC, [rSELF, #offThread_pc]
77 #define SAVE_PC_TO_SELF() str rPC, [rSELF, #offThread_pc]
80 #define LOAD_PC_FP_FROM_SELF() ldmia rSELF, {rPC, rFP}
81 #define SAVE_PC_FP_TO_SELF() stmia rSELF, {rPC, rFP}
93 str rPC, [rFP, #(-sizeofStackSaveArea + offStackSaveArea_currentPc)]
104 * Fetch the next instruction from rPC into rINST. Does not advance rPC.
106 #define FETCH_INST() ldrh rINST, [rPC]
[all...] |
| /dalvik/vm/mterp/out/ |
| InterpAsm-x86-atom.S | 51 * %esi rPC interpreted program counter, used for fetching
73 #define rPC %esi
97 movl rPC, offGlue_pc(\_reg)
107 movl offGlue_pc(rFP), rPC
122 movl rPC, (-sizeofStackSaveArea + offStackSaveArea_currentPc)(rFP)
151 * Fetch the next instruction from rPC into rINST. Does not advance rPC.
155 movzwl (rPC), rINST
159 * Fetch the next instruction from the specified offset. Advances rPC
168 add $(\_count*2), rPC
[all...] |
| InterpAsm-x86.S | 61 rPC edi interpreted program counter, used for fetching instructions
70 o rPC, rFP, rINSTw/rINSTbl valid on handler entry and exit
76 #define rPC %esi
132 movl rPC,offThread_pc(\_reg)
138 movl offThread_pc(rFP),rPC
156 movl rPC, (-sizeofStackSaveArea + offStackSaveArea_currentPc)(rFP)
169 * Fetch the next instruction from rPC into rINSTw. Does not advance rPC.
172 movzwl (rPC),rINST
180 movzbl (rPC),\_re
[all...] |
| InterpAsm-armv5te-vfp.S | 64 r4 rPC interpreted program counter, used for fetching instructions
76 #define rPC r4
83 #define LOAD_PC_FROM_SELF() ldr rPC, [rSELF, #offThread_pc]
84 #define SAVE_PC_TO_SELF() str rPC, [rSELF, #offThread_pc]
87 #define LOAD_PC_FP_FROM_SELF() ldmia rSELF, {rPC, rFP}
88 #define SAVE_PC_FP_TO_SELF() stmia rSELF, {rPC, rFP}
100 str rPC, [rFP, #(-sizeofStackSaveArea + offStackSaveArea_currentPc)]
111 * Fetch the next instruction from rPC into rINST. Does not advance rPC.
113 #define FETCH_INST() ldrh rINST, [rPC]
[all...] |
| InterpAsm-armv5te.S | 64 r4 rPC interpreted program counter, used for fetching instructions
76 #define rPC r4
83 #define LOAD_PC_FROM_SELF() ldr rPC, [rSELF, #offThread_pc]
84 #define SAVE_PC_TO_SELF() str rPC, [rSELF, #offThread_pc]
87 #define LOAD_PC_FP_FROM_SELF() ldmia rSELF, {rPC, rFP}
88 #define SAVE_PC_FP_TO_SELF() stmia rSELF, {rPC, rFP}
100 str rPC, [rFP, #(-sizeofStackSaveArea + offStackSaveArea_currentPc)]
111 * Fetch the next instruction from rPC into rINST. Does not advance rPC.
113 #define FETCH_INST() ldrh rINST, [rPC]
[all...] |
| InterpAsm-armv7-a-neon.S | 64 r4 rPC interpreted program counter, used for fetching instructions
76 #define rPC r4
83 #define LOAD_PC_FROM_SELF() ldr rPC, [rSELF, #offThread_pc]
84 #define SAVE_PC_TO_SELF() str rPC, [rSELF, #offThread_pc]
87 #define LOAD_PC_FP_FROM_SELF() ldmia rSELF, {rPC, rFP}
88 #define SAVE_PC_FP_TO_SELF() stmia rSELF, {rPC, rFP}
100 str rPC, [rFP, #(-sizeofStackSaveArea + offStackSaveArea_currentPc)]
111 * Fetch the next instruction from rPC into rINST. Does not advance rPC.
113 #define FETCH_INST() ldrh rINST, [rPC]
[all...] |
| InterpAsm-armv7-a.S | 64 r4 rPC interpreted program counter, used for fetching instructions
76 #define rPC r4
83 #define LOAD_PC_FROM_SELF() ldr rPC, [rSELF, #offThread_pc]
84 #define SAVE_PC_TO_SELF() str rPC, [rSELF, #offThread_pc]
87 #define LOAD_PC_FP_FROM_SELF() ldmia rSELF, {rPC, rFP}
88 #define SAVE_PC_FP_TO_SELF() stmia rSELF, {rPC, rFP}
100 str rPC, [rFP, #(-sizeofStackSaveArea + offStackSaveArea_currentPc)]
111 * Fetch the next instruction from rPC into rINST. Does not advance rPC.
113 #define FETCH_INST() ldrh rINST, [rPC]
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| /dalvik/vm/mterp/x86/ |
| header.S | 54 rPC edi interpreted program counter, used for fetching instructions
63 o rPC, rFP, rINSTw/rINSTbl valid on handler entry and exit
69 #define rPC %esi
125 movl rPC,offThread_pc(\_reg)
131 movl offThread_pc(rFP),rPC
149 movl rPC, (-sizeofStackSaveArea + offStackSaveArea_currentPc)(rFP)
162 * Fetch the next instruction from rPC into rINSTw. Does not advance rPC.
165 movzwl (rPC),rINST
173 movzbl (rPC),\_re
[all...] |
| /dalvik/vm/compiler/codegen/x86/ |
| X86LIR.h | 30 * edi is Dalvik PC (rPC)
46 * materialize Dalvik PC of target in rPC/%edx
49 * instruction at (rPC)
147 #define rPC rEDI
|
| /dalvik/vm/compiler/codegen/arm/ |
| ArmLIR.h | 25 * r4 (rPC) is scratch for Jit, but most be restored when resuming interp
60 * restore rPC
211 * rPC, rFP, and rSELF are for architecture-independent code to use.
218 rPC = 4,
219 r4PC = rPC,
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