/external/v8/src/arm/ |
constants-arm.h | 116 // General constants are in an anonymous enum in class Instr. 181 // Instr is merely used by the Assembler to distinguish 32bit integers 185 typedef int32_t Instr; 446 extern const Instr kPopInstruction; 450 extern const Instr kPushRegPattern; 454 extern const Instr kPopRegPattern; 457 extern const Instr kMovLrPc; 459 extern const Instr kLdrPCMask; 460 extern const Instr kLdrPCPattern; 462 extern const Instr kBlxRegMask [all...] |
assembler-arm.h | 426 // instructions instr is ignored. 427 bool is_single_instruction(Instr instr = 0) const; 602 extern const Instr kMovLrPc; 603 extern const Instr kLdrPCMask; 604 extern const Instr kLdrPCPattern; 605 extern const Instr kBlxRegMask; 606 extern const Instr kBlxRegPattern; 607 extern const Instr kBlxIp; 609 extern const Instr kMovMvnMask [all...] |
assembler-arm.cc | 144 Instr* pc = reinterpret_cast<Instr*>(pc_); 145 Instr* instr = reinterpret_cast<Instr*>(instructions); local 147 *(pc + i) = *(instr + i); 239 const Instr kPopInstruction = 244 const Instr kPushRegPattern = 248 const Instr kPopRegPattern = 251 const Instr kMovLrPc = al | MOV | kRegister_pc_Code | kRegister_lr_Code * B12 554 Instr instr = instr_at(pos); local 571 Instr instr = instr_at(pos); local 605 Instr instr = instr_at(l.pos()); local [all...] |
assembler-arm-inl.h | 204 Instr current_instr = Assembler::instr_at(pc_); 205 Instr next_instr = Assembler::instr_at(pc_ + Assembler::kInstrSize); 223 Instr current_instr = Assembler::instr_at(pc_); 325 void Assembler::emit(Instr x) { 327 *reinterpret_cast<Instr*>(pc_) = x; 334 Instr instr = Memory::int32_at(target_pc); local 339 if ((instr & kBxInstMask) == kBxInstPattern) { 341 instr = Memory::int32_at(target_pc); 347 if ((instr & kBlxRegMask) == kBlxRegPattern) [all...] |
simulator-arm.h | 231 void Format(Instruction* instr, const char* format); 235 bool ConditionallyExecute(Instruction* instr); 257 int32_t GetShiftRm(Instruction* instr, bool* carry_out); 258 int32_t GetImm(Instruction* instr, bool* carry_out); 259 void ProcessPUW(Instruction* instr, 264 void HandleRList(Instruction* instr, bool load); 266 void SoftwareInterrupt(Instruction* instr); 269 inline bool isStopInstruction(Instruction* instr); 283 inline uint16_t ReadHU(int32_t addr, Instruction* instr); 284 inline int16_t ReadH(int32_t addr, Instruction* instr); [all...] |
macro-assembler-arm.h | 627 static inline bool IsMarkedCode(Instr instr, int type) { 629 return IsNop(instr, type); 633 static inline int GetCodeMarker(Instr instr) { 637 int dst_reg = (instr & dst_mask) >> dst_reg_offset; 638 int src_reg = instr & src_mask; 643 int type = ((instr & non_register_mask) == mov_mask) && [all...] |
code-stubs-arm.h | 498 Instr first_instruction = Assembler::instr_at(stub->instruction_start()); 499 Instr second_instruction = Assembler::instr_at(stub->instruction_start() + [all...] |
ic-arm.cc | 1704 Instr instr = Assembler::instr_at(cmp_instruction_address); local [all...] |
/external/v8/src/mips/ |
assembler-mips.h | 593 static const int kInstrSize = sizeof(Instr); 952 static Instr instr_at(byte* pc) { return *reinterpret_cast<Instr*>(pc); } 953 static void instr_at_put(byte* pc, Instr instr) { 954 *reinterpret_cast<Instr*>(pc) = instr; 956 Instr instr_at(int pos) { return *reinterpret_cast<Instr*>(buffer_ + pos); } 957 void instr_at_put(int pos, Instr instr) [all...] |
constants-mips.h | 172 typedef int32_t Instr; 570 extern const Instr kPopInstruction; 572 extern const Instr kPushInstruction; 574 extern const Instr kPushRegPattern; 576 extern const Instr kPopRegPattern; 577 extern const Instr kLwRegFpOffsetPattern; 578 extern const Instr kSwRegFpOffsetPattern; 579 extern const Instr kLwRegFpNegOffsetPattern; 580 extern const Instr kSwRegFpNegOffsetPattern; 582 extern const Instr kRtMask [all...] |
assembler-mips.cc | 190 Instr* pc = reinterpret_cast<Instr*>(pc_); 191 Instr* instr = reinterpret_cast<Instr*>(instructions); local 193 *(pc + i) = *(instr + i); 240 const Instr kPopInstruction = ADDIU | (kRegister_sp_Code << kRsShift) 243 const Instr kPushInstruction = ADDIU | (kRegister_sp_Code << kRsShift) 246 const Instr kPushRegPattern = SW | (kRegister_sp_Code << kRsShift) 249 const Instr kPopRegPattern = LW | (kRegister_sp_Code << kRsShift 768 Instr instr = instr_at(l.pos()); local 794 Instr instr = instr_at(fixup_pos); local 860 Instr instr = opcode | (rs.code() << kRsShift) | (rt.code() << kRtShift) local 873 Instr instr = opcode | (rs.code() << kRsShift) | (rt.code() << kRtShift) local 887 Instr instr = opcode | fmt | (ft.code() << kFtShift) | (fs.code() << kFsShift) local 901 Instr instr = opcode | fmt | (rt.code() << kRtShift) local 914 Instr instr = local 927 Instr instr = opcode | (rs.code() << kRsShift) | (rt.code() << kRtShift) local 938 Instr instr = opcode | (rs.code() << kRsShift) | SF | (j & kImm16Mask); local 949 Instr instr = opcode | (rs.code() << kRsShift) | (ft.code() << kFtShift) local 959 Instr instr = opcode | address; local 1322 Instr instr = SPECIAL | (1 << kRsShift) | (rt.code() << kRtShift) local 1332 Instr instr = SPECIAL | (rs.code() << kRsShift) | (rt.code() << kRtShift) local 1491 Instr instr = SPECIAL | TGE | rs.code() << kRsShift local 1499 Instr instr = SPECIAL | TGEU | rs.code() << kRsShift local 1507 Instr instr = local 1515 Instr instr = local 1524 Instr instr = local 1532 Instr instr = local 1865 Instr instr = COP1 | fmt | ft.code() << 16 | fs.code() << kFsShift local 1884 Instr instr = COP1 | BC1 | cc << 18 | 0 << 16 | (offset & kImm16Mask); local 1892 Instr instr = COP1 | BC1 | cc << 18 | 1 << 16 | (offset & kImm16Mask); local 1921 Instr instr = instr_at(pc); local [all...] |
assembler-mips-inl.h | 275 Instr instr0 = Assembler::instr_at(pc_); 276 Instr instr1 = Assembler::instr_at(pc_ + 1 * Assembler::kInstrSize); 277 Instr instr2 = Assembler::instr_at(pc_ + 2 * Assembler::kInstrSize); 288 Instr current_instr = Assembler::instr_at(pc_); 361 void Assembler::emit(Instr x) { 365 *reinterpret_cast<Instr*>(pc_) = x;
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simulator-mips.h | 251 void Format(Instruction* instr, const char* format); 259 inline uint16_t ReadHU(int32_t addr, Instruction* instr); 260 inline int16_t ReadH(int32_t addr, Instruction* instr); 262 inline void WriteH(int32_t addr, uint16_t value, Instruction* instr); 263 inline void WriteH(int32_t addr, int16_t value, Instruction* instr); 265 inline int ReadW(int32_t addr, Instruction* instr); 266 inline void WriteW(int32_t addr, int value, Instruction* instr); 268 inline double ReadD(int32_t addr, Instruction* instr); 269 inline void WriteD(int32_t addr, double value, Instruction* instr); 280 void DecodeTypeRegister(Instruction* instr); [all...] |
macro-assembler-mips.h | 443 static inline bool IsMarkedCode(Instr instr, int type) { 445 return IsNop(instr, type); 449 static inline int GetCodeMarker(Instr instr) { 450 uint32_t opcode = ((instr & kOpcodeMask)); 451 uint32_t rt = ((instr & kRtFieldMask) >> kRtShift); 452 uint32_t rs = ((instr & kRsFieldMask) >> kRsShift); 453 uint32_t sa = ((instr & kSaFieldMask) >> kSaShift); 549 #define DEFINE_INSTRUCTION(instr) \ [all...] |
code-stubs-mips.h | 513 Instr first_instruction = Assembler::instr_at(stub->instruction_start()); 514 Instr second_instruction = Assembler::instr_at(stub->instruction_start() + [all...] |
/external/openssl/crypto/des/times/ |
aix.cc | 6 Data/Instr Cache : 16 K
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/external/llvm/include/llvm/CodeGen/ |
ScheduleDAG.h | 231 MachineInstr *Instr; // Alternatively, a MachineInstr. 281 : Node(node), Instr(0), OrigNode(0), NodeNum(nodenum), 294 SUnit(MachineInstr *instr, unsigned nodenum) 295 : Node(0), Instr(instr), OrigNode(0), NodeNum(nodenum), 308 : Node(0), Instr(0), OrigNode(0), NodeNum(~0u), 322 assert(!Instr && "Setting SDNode of SUnit with MachineInstr!"); 329 assert(!Instr && "Reading SDNode of SUnit with MachineInstr!"); 335 bool isInstr() const { return Instr; } 341 Instr = MI [all...] |
LiveIntervalAnalysis.h | 199 /// isNotInMIMap - returns true if the specified machine instr has been 201 bool isNotInMIMap(const MachineInstr* Instr) const { 202 return !indexes_->hasIndex(Instr); 206 SlotIndex getInstructionIndex(const MachineInstr *instr) const { 207 return indexes_->getInstructionIndex(instr);
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/external/llvm/lib/MC/ |
MCDwarf.cpp | [all...] |
/external/llvm/utils/TableGen/ |
InstrInfoEmitter.cpp | 220 const CodeGenInstruction *Instr = NumberedInstructions[i]; 221 InstrNames.add(Instr->TheDef->getName()); 233 const CodeGenInstruction *Instr = NumberedInstructions[i]; 234 OS << InstrNames.get(Instr->TheDef->getName()) << "U, ";
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CodeGenTarget.cpp | 297 const CodeGenInstruction *Instr = GetInstByName(*p, Insts, Records); 298 assert(Instr && "Missing target independent instruction"); 299 assert(Instr->Namespace == "TargetOpcode" && "Bad namespace"); 300 InstrsByEnum.push_back(Instr); 311 assert(InstrsByEnum.size() == Insts.size() && "Missing predefined instr");
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/external/llvm/include/llvm-c/ |
Core.h | [all...] |
/external/llvm/lib/VMCore/ |
Core.cpp | [all...] |
/external/llvm/tools/llvm-stress/ |
llvm-stress.cpp | 661 Instruction *Instr = *it; 662 BasicBlock *Curr = Instr->getParent(); 663 BasicBlock::iterator Loc= Instr; 665 Instr->moveBefore(Curr->getTerminator()); 667 BranchInst::Create(Curr, Next, Instr, Curr->getTerminator());
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/external/llvm/lib/Target/ARM/ |
ARMBaseInstrInfo.cpp | 555 // If this machine instr is an inline asm, measure it. 579 // If this machine instr is a constant pool entry, its size is recorded as [all...] |