| /external/llvm/lib/Target/Mips/ |
| MipsAsmPrinter.h | 26 class MachineInstr;
33 void EmitInstrWithMacroNoAT(const MachineInstr *MI);
52 void EmitInstruction(const MachineInstr *MI);
62 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
65 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum,
68 void printOperand(const MachineInstr *MI, int opNum, raw_ostream &O);
69 void printUnsignedImm(const MachineInstr *MI, int opNum, raw_ostream &O);
70 void printMemOperand(const MachineInstr *MI, int opNum, raw_ostream &O);
71 void printMemOperandEA(const MachineInstr *MI, int opNum, raw_ostream &O);
72 void printFCCOperand(const MachineInstr *MI, int opNum, raw_ostream &O
[all...] |
| MipsMCInstLower.h | 1 //===-- MipsMCInstLower.h - Lower MachineInstr to MCInst -------*- C++ -*--===//
20 class MachineInstr;
25 /// MipsMCInstLower - This class is used to lower an MachineInstr into an
35 void Lower(const MachineInstr *MI, MCInst &OutMI) const;
38 void LowerUnalignedLoadStore(const MachineInstr *MI,
40 void LowerSETGP01(const MachineInstr *MI, SmallVector<MCInst, 4>& MCInsts);
|
| /external/llvm/lib/Target/X86/ |
| X86AsmPrinter.h | 47 virtual void EmitInstruction(const MachineInstr *MI);
52 void printOperand(const MachineInstr *MI, unsigned OpNo, raw_ostream &O,
54 void print_pcrel_imm(const MachineInstr *MI, unsigned OpNo, raw_ostream &O);
57 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
60 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
64 void printMachineInstruction(const MachineInstr *MI);
65 void printSSECC(const MachineInstr *MI, unsigned Op, raw_ostream &O);
66 void printMemReference(const MachineInstr *MI, unsigned Op, raw_ostream &O,
68 void printLeaMemReference(const MachineInstr *MI, unsigned Op, raw_ostream &O,
71 void printPICLabel(const MachineInstr *MI, unsigned Op, raw_ostream &O)
[all...] |
| X86InstrInfo.h | 109 inline static bool isLeaMem(const MachineInstr *MI, unsigned Op) {
120 inline static bool isMem(const MachineInstr *MI, unsigned Op) {
166 virtual bool isCoalescableExtInstr(const MachineInstr &MI,
170 unsigned isLoadFromStackSlot(const MachineInstr *MI, int &FrameIndex) const;
174 unsigned isLoadFromStackSlotPostFE(const MachineInstr *MI,
177 unsigned isStoreToStackSlot(const MachineInstr *MI, int &FrameIndex) const;
181 unsigned isStoreToStackSlotPostFE(const MachineInstr *MI,
184 bool isReallyTriviallyReMaterializable(const MachineInstr *MI,
188 const MachineInstr *Orig,
201 virtual MachineInstr *convertToThreeAddress(MachineFunction::iterator &MFI
[all...] |
| /external/llvm/include/llvm/Target/ |
| TargetInstrInfo.h | 65 bool isTriviallyReMaterializable(const MachineInstr *MI,
80 virtual bool isReallyTriviallyReMaterializable(const MachineInstr *MI,
91 bool isReallyTriviallyReMaterializableGeneric(const MachineInstr *MI,
110 virtual bool isCoalescableExtInstr(const MachineInstr &MI,
121 virtual unsigned isLoadFromStackSlot(const MachineInstr *MI,
129 virtual unsigned isLoadFromStackSlotPostFE(const MachineInstr *MI,
141 virtual bool hasLoadFromStackSlot(const MachineInstr *MI,
152 virtual unsigned isStoreToStackSlot(const MachineInstr *MI,
160 virtual unsigned isStoreToStackSlotPostFE(const MachineInstr *MI,
171 virtual bool hasStoreToStackSlot(const MachineInstr *MI
[all...] |
| /external/llvm/lib/CodeGen/ |
| AntiDepBreaker.h | 33 typedef std::vector<std::pair<MachineInstr *, MachineInstr *> >
54 virtual void Observe(MachineInstr *MI, unsigned Count,
62 void UpdateDbgValue(MachineInstr *MI, unsigned OldReg, unsigned NewReg) {
|
| RegisterCoalescer.h | 20 class MachineInstr;
65 bool setRegisters(const MachineInstr*);
73 bool isCoalescable(const MachineInstr*) const;
|
| /external/llvm/include/llvm/CodeGen/ |
| LiveVariables.h | 34 #include "llvm/CodeGen/MachineInstr.h"
91 std::vector<MachineInstr*> Kills;
96 bool removeKill(MachineInstr *MI) {
97 std::vector<MachineInstr*>::iterator
106 MachineInstr *findKill(const MachineBasicBlock *MBB) const;
145 MachineInstr **PhysRegDef;
150 MachineInstr **PhysRegUse;
156 DenseMap<MachineInstr*, unsigned> DistanceMap;
161 bool HandlePhysRegKill(unsigned Reg, MachineInstr *MI);
166 void HandlePhysRegUse(unsigned Reg, MachineInstr *MI)
[all...] |
| DFAPacketizer.h | 35 class MachineInstr;
75 bool canReserveResources(llvm::MachineInstr *MI);
79 void reserveResources(llvm::MachineInstr *MI);
99 std::vector<MachineInstr*> CurrentPacketMIs;
121 void addToPacket(MachineInstr *MI);
124 void endPacket(MachineBasicBlock *MBB, MachineInstr *I);
127 bool ignorePseudoInstruction(MachineInstr *I, MachineBasicBlock *MBB);
131 bool isSoloInstruction(MachineInstr *I);
|
| MachineInstrBundle.h | 46 static inline MachineInstr *getBundleStart(MachineInstr *MI) {
53 static inline const MachineInstr *getBundleStart(const MachineInstr *MI) {
65 /// MachineInstr, or all operands on a bundle of MachineInstrs. This class is
78 MachineInstr::mop_iterator OpI, OpE;
99 explicit MachineOperandIteratorBase(MachineInstr *MI, bool WholeBundle) {
158 SmallVectorImpl<std::pair<MachineInstr*, unsigned> > *Ops = 0);
165 MIOperands(MachineInstr *MI) : MachineOperandIteratorBase(MI, false) {}
174 ConstMIOperands(const MachineInstr *MI
[all...] |
| ProcessImplicitDefs.h | 19 class MachineInstr;
33 bool CanTurnIntoImplicitDef(MachineInstr *MI, unsigned Reg,
|
| MachineSSAUpdater.h | 20 class MachineInstr;
50 SmallVectorImpl<MachineInstr*> *InsertedPHIs;
58 SmallVectorImpl<MachineInstr*> *InsertedPHIs = 0);
|
| /external/llvm/lib/Target/ARM/ |
| ARMAsmPrinter.h | 57 void printOperand(const MachineInstr *MI, int OpNum, raw_ostream &O,
60 virtual bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
63 virtual bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum,
67 void EmitJumpTable(const MachineInstr *MI);
68 void EmitJump2Table(const MachineInstr *MI);
69 virtual void EmitInstruction(const MachineInstr *MI);
89 void EmitPatchedInstruction(const MachineInstr *MI, unsigned TargetOpc);
91 void EmitUnwindingInstruction(const MachineInstr *MI);
95 const MachineInstr *MI);
98 void PrintDebugValueComment(const MachineInstr *MI, raw_ostream &OS)
[all...] |
| ARMBaseInstrInfo.h | 45 virtual MachineInstr *convertToThreeAddress(MachineFunction::iterator &MFI,
75 bool isPredicated(const MachineInstr *MI) const;
77 ARMCC::CondCodes getPredicate(const MachineInstr *MI) const {
84 bool PredicateInstruction(MachineInstr *MI,
91 virtual bool DefinesPredicate(MachineInstr *MI,
94 virtual bool isPredicable(MachineInstr *MI) const;
96 /// GetInstSize - Returns the size of the specified MachineInstr.
98 virtual unsigned GetInstSizeInBytes(const MachineInstr* MI) const;
100 virtual unsigned isLoadFromStackSlot(const MachineInstr *MI,
102 virtual unsigned isStoreToStackSlot(const MachineInstr *MI
[all...] |
| MLxExpansionPass.cpp | 19 #include "llvm/CodeGen/MachineInstr.h"
56 MachineInstr* LastMIs[4];
57 SmallPtrSet<MachineInstr*, 4> IgnoreStall;
60 void pushStack(MachineInstr *MI);
61 MachineInstr *getAccDefMI(MachineInstr *MI) const;
62 unsigned getDefReg(MachineInstr *MI) const;
63 bool hasRAWHazard(unsigned Reg, MachineInstr *MI) const;
64 bool FindMLxHazard(MachineInstr *MI);
65 void ExpandFPMLxInstruction(MachineBasicBlock &MBB, MachineInstr *MI
[all...] |
| ARMCodeEmitter.cpp | 30 #include "llvm/CodeGen/MachineInstr.h"
77 uint64_t getBinaryCodeForInstr(const MachineInstr &MI) const;
85 void emitInstruction(const MachineInstr &MI);
92 void emitConstPoolInstruction(const MachineInstr &MI);
93 void emitMOVi32immInstruction(const MachineInstr &MI);
94 void emitMOVi2piecesInstruction(const MachineInstr &MI);
95 void emitLEApcrelInstruction(const MachineInstr &MI);
96 void emitLEApcrelJTInstruction(const MachineInstr &MI);
97 void emitPseudoMoveInstruction(const MachineInstr &MI);
99 void emitPseudoInstruction(const MachineInstr &MI)
[all...] |
| ARM.h | 29 class MachineInstr;
46 void LowerARMMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI,
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonMachineFunctionInfo.h | 29 std::vector<MachineInstr*> AllocaAdjustInsts;
33 std::map<const MachineInstr*, unsigned> PacketInfo;
45 void addAllocaAdjustInst(MachineInstr* MI) {
48 const std::vector<MachineInstr*>& getAllocaAdjustInsts() {
55 void setStartPacket(MachineInstr* MI) {
58 void setEndPacket(MachineInstr* MI) {
61 bool isStartPacket(const MachineInstr* MI) const {
65 bool isEndPacket(const MachineInstr* MI) const {
|
| HexagonAsmPrinter.h | 39 virtual void EmitInstruction(const MachineInstr *MI);
43 void printOperand(const MachineInstr *MI, unsigned OpNo, raw_ostream &O);
44 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
47 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
55 void printInstruction(const MachineInstr *MI, raw_ostream &O);
57 // void printMachineInstruction(const MachineInstr *MI);
69 void printImmOperand(const MachineInstr *MI, unsigned OpNo,
75 void printNegImmOperand(const MachineInstr *MI, unsigned OpNo,
81 void printMEMriOperand(const MachineInstr *MI, unsigned OpNo,
91 void printFrameIndexOperand(const MachineInstr *MI, unsigned OpNo
[all...] |
| HexagonInstrInfo.h | 45 virtual unsigned isLoadFromStackSlot(const MachineInstr *MI,
53 virtual unsigned isStoreToStackSlot(const MachineInstr *MI,
83 SmallVectorImpl<MachineInstr*> &NewMIs) const;
94 SmallVectorImpl<MachineInstr*> &NewMIs) const;
96 virtual MachineInstr* foldMemoryOperandImpl(MachineFunction &MF,
97 MachineInstr* MI,
101 virtual MachineInstr* foldMemoryOperandImpl(MachineFunction &MF,
102 MachineInstr* MI,
104 MachineInstr* LoadMI) const {
110 virtual bool isPredicable(MachineInstr *MI) const
[all...] |
| /external/llvm/lib/Target/PTX/ |
| PTX.h | 21 class MachineInstr;
38 void LowerPTXMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI,
|
| PTXInstrInfo.h | 52 virtual bool isMoveInstr(const MachineInstr& MI,
58 virtual bool isPredicated(const MachineInstr *MI) const;
60 virtual bool isUnpredicatedTerminator(const MachineInstr *MI) const;
63 bool PredicateInstruction(MachineInstr *MI,
70 virtual bool DefinesPredicate(MachineInstr *MI,
74 virtual bool isPredicable(MachineInstr *MI) const { return true; }
97 // virtual MachineInstr* foldMemoryOperandImpl(MachineFunction &MF,
98 // MachineInstr* MI,
123 static void AddDefaultPredicate(MachineInstr *MI);
125 static bool IsAnyKindOfBranch(const MachineInstr& inst)
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPC.h | 29 class MachineInstr;
37 void LowerPPCMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI,
|
| /external/llvm/lib/Target/MSP430/ |
| MSP430AsmPrinter.cpp | 29 #include "llvm/CodeGen/MachineInstr.h"
49 void printOperand(const MachineInstr *MI, int OpNum,
51 void printSrcMemOperand(const MachineInstr *MI, int OpNum,
53 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
56 bool PrintAsmMemoryOperand(const MachineInstr *MI,
59 void EmitInstruction(const MachineInstr *MI);
64 void MSP430AsmPrinter::printOperand(const MachineInstr *MI, int OpNum,
111 void MSP430AsmPrinter::printSrcMemOperand(const MachineInstr *MI, int OpNum,
133 bool MSP430AsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
144 bool MSP430AsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI
[all...] |
| /external/llvm/lib/Target/CellSPU/ |
| SPUAsmPrinter.cpp | 51 void printInstruction(const MachineInstr *MI, raw_ostream &OS);
55 void EmitInstruction(const MachineInstr *MI) {
63 void printOperand(const MachineInstr *MI, unsigned OpNo, raw_ostream &O) {
74 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
77 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
83 printU7ImmOperand(const MachineInstr *MI, unsigned OpNo, raw_ostream &O)
91 printShufAddr(const MachineInstr *MI, unsigned OpNo, raw_ostream &O)
101 printS16ImmOperand(const MachineInstr *MI, unsigned OpNo, raw_ostream &O)
107 printU16ImmOperand(const MachineInstr *MI, unsigned OpNo, raw_ostream &O)
113 printMemRegReg(const MachineInstr *MI, unsigned OpNo, raw_ostream &O)
[all...] |
