| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| X86MCCodeEmitter.cpp | 119 uint64_t TSFlags, unsigned &CurByte, raw_ostream &OS,
125 void EmitVEXOpcodePrefix(uint64_t TSFlags, unsigned &CurByte, int MemOperand,
129 void EmitSegmentOverridePrefix(uint64_t TSFlags, unsigned &CurByte,
133 void EmitOpcodePrefix(uint64_t TSFlags, unsigned &CurByte, int MemOperand,
154 /// in an instruction with the specified TSFlags.
155 static MCFixupKind getImmFixupKind(uint64_t TSFlags) {
156 unsigned Size = X86II::getSizeOfImm(TSFlags);
157 bool isPCRel = X86II::isImmPCRel(TSFlags);
298 uint64_t TSFlags, unsigned &CurByte,
326 int ImmSize = X86II::hasImm(TSFlags) ? X86II::getSizeOfImm(TSFlags) : 0
[all...] |
| X86BaseInfo.h | 441 static inline unsigned char getBaseOpcodeFor(uint64_t TSFlags) {
442 return TSFlags >> X86II::OpcodeShift;
445 static inline bool hasImm(uint64_t TSFlags) {
446 return (TSFlags & X86II::ImmMask) != 0;
449 /// getSizeOfImm - Decode the "size of immediate" field from the TSFlags field
451 static inline unsigned getSizeOfImm(uint64_t TSFlags) {
452 switch (TSFlags & X86II::ImmMask) {
465 /// TSFlags indicates that it is pc relative.
466 static inline unsigned isImmPCRel(uint64_t TSFlags) {
467 switch (TSFlags & X86II::ImmMask)
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCHazardRecognizers.cpp | 99 uint64_t TSFlags = MCID.TSFlags;
101 isFirst = TSFlags & PPCII::PPC970_First;
102 isSingle = TSFlags & PPCII::PPC970_Single;
103 isCracked = TSFlags & PPCII::PPC970_Cracked;
104 return (PPCII::PPC970_Unit)(TSFlags & PPCII::PPC970_Mask);
|
| /external/llvm/lib/Target/ARM/ |
| ARMHazardRecognizer.cpp | 23 unsigned Domain = MCID.TSFlags & ARMII::DomainMask;
44 if (LastMI && (MCID.TSFlags & ARMII::DomainMask) != ARMII::DomainGeneral) {
51 (LastMCID.TSFlags & ARMII::DomainMask) == ARMII::DomainGeneral) {
|
| ARMCodeEmitter.cpp | 471 unsigned Reloc = ((MCID.TSFlags & ARMII::FormMask) == ARMII::VFPLdStFrm)
551 switch (MI.getDesc().TSFlags & ARMII::FormMask) {
[all...] |
| MLxExpansionPass.cpp | 141 unsigned Domain = MCID.TSFlags & ARMII::DomainMask;
284 unsigned Domain = MCID.TSFlags & ARMII::DomainMask;
|
| ARMBaseRegisterInfo.cpp | 785 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask);
[all...] |
| ARMBaseInstrInfo.cpp | 127 uint64_t TSFlags = MI->getDesc().TSFlags;
129 switch ((TSFlags & ARMII::IndexModeMask) >> ARMII::IndexModeShift) {
146 unsigned AddrMode = (TSFlags & ARMII::AddrModeMask);
526 if ((MI->getDesc().TSFlags & ARMII::DomainMask) == ARMII::DomainNEON) {
[all...] |
| Thumb2InstrInfo.cpp | 393 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask);
|
| Thumb1RegisterInfo.cpp | 394 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask);
|
| ARMFrameLowering.cpp | [all...] |
| ARMFastISel.cpp | 250 if ((MCID.TSFlags & ARMII::DomainMask) != ARMII::DomainNEON ||
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86CodeEmitter.cpp | 154 if ((Desc.TSFlags & X86II::FormMask) == X86II::Pseudo)
156 if (Desc.TSFlags & X86II::REX_W)
175 switch (Desc.TSFlags & X86II::FormMask) {
631 if (Desc->TSFlags & X86II::LOCK)
635 switch (Desc->TSFlags & X86II::SegOvrMask) {
647 if ((Desc->TSFlags & X86II::Op0Mask) == X86II::REP)
651 if (Desc->TSFlags & X86II::OpSize)
655 if (Desc->TSFlags & X86II::AdSize)
659 switch (Desc->TSFlags & X86II::Op0Mask) {
682 (((Desc->TSFlags & X86II::Op0Mask)-X86II::D8
[all...] |
| X86FloatingPoint.cpp | 414 uint64_t Flags = MI->getDesc().TSFlags;
[all...] |
| X86InstrInfo.cpp | [all...] |
| /external/llvm/lib/Target/MBlaze/MCTargetDesc/ |
| MBlazeMCCodeEmitter.cpp | 181 uint64_t TSFlags = Desc.TSFlags;
188 switch ((TSFlags & MBlazeII::FormMask)) {
|
| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| MipsMCCodeEmitter.cpp | 123 uint64_t TSFlags = Desc.TSFlags;
127 if ((TSFlags & MipsII::FormMask) == MipsII::Pseudo)
|
| /external/llvm/lib/Target/Mips/ |
| MipsCodeEmitter.cpp | 160 uint64_t TSFlags = MI.getDesc().TSFlags;
161 uint64_t Form = TSFlags & MipsII::FormMask;
384 if ((MI.getDesc().TSFlags & MipsII::FormMask) == MipsII::Pseudo)
|
| /external/llvm/include/llvm/MC/ |
| MCInstrDesc.h | 141 uint64_t TSFlags; // Target Specific Flag values
|
| /external/llvm/lib/Target/MSP430/ |
| MSP430InstrInfo.cpp | 295 switch (Desc.TSFlags & MSP430II::SizeMask) {
|
| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| ARMMCCodeEmitter.cpp | [all...] |
| /external/llvm/lib/Target/MBlaze/Disassembler/ |
| MBlazeDisassembler.cpp | 537 uint64_t tsFlags = MBlazeInsts[opcode].TSFlags;
538 switch ((tsFlags & MBlazeII::FormMask)) {
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonInstrInfo.cpp | [all...] |
| /external/llvm/lib/Target/ARM/AsmParser/ |
| ARMAsmParser.cpp | [all...] |
