/external/llvm/lib/CodeGen/SelectionDAG/ |
SelectionDAG.cpp | 57 static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) { 58 SDVTList Res = {VTs, NumVTs}; 332 ID.AddPointer(VTList.VTs); [all...] |
SelectionDAGISel.cpp | [all...] |
ScheduleDAGSDNodes.cpp | 135 SmallVector<EVT, 4> VTs; 145 VTs.push_back(N->getValueType(I)); 148 VTs.push_back(MVT::Glue); 157 SDVTList VTList = DAG->getVTList(&VTs[0], VTs.size());
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LegalizeDAG.cpp | [all...] |
SelectionDAGBuilder.cpp | [all...] |
/external/llvm/include/llvm/CodeGen/ |
SelectionDAG.h | 322 SDVTList getVTList(const EVT *VTs, unsigned NumVTs); 412 SDVTList VTs = getVTList(MVT::Other, MVT::Glue); 414 return getNode(ISD::CopyToReg, dl, VTs, Ops, Glue.getNode() ? 4 : 3); 420 SDVTList VTs = getVTList(MVT::Other, MVT::Glue); 422 return getNode(ISD::CopyToReg, dl, VTs, Ops, Glue.getNode() ? 4 : 3); 426 SDVTList VTs = getVTList(VT, MVT::Other); 428 return getNode(ISD::CopyFromReg, dl, VTs, Ops, 2); 436 SDVTList VTs = getVTList(VT, MVT::Other, MVT::Glue); 438 return getNode(ISD::CopyFromReg, dl, VTs, Ops, Glue.getNode() ? 3 : 2); 479 SDVTList VTs = getVTList(MVT::Other, MVT::Glue) [all...] |
SelectionDAGNodes.h | 58 const EVT *VTs; 677 SDNode(unsigned Opc, const DebugLoc dl, SDVTList VTs, const SDValue *Ops, 682 ValueList(VTs.VTs), UseList(NULL), 683 NumOperands(NumOps), NumValues(VTs.NumVTs), 694 SDNode(unsigned Opc, const DebugLoc dl, SDVTList VTs) 696 SubclassData(0), NodeId(-1), OperandList(0), ValueList(VTs.VTs), 697 UseList(NULL), NumOperands(0), NumValues(VTs.NumVTs), 830 UnarySDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, SDValue X [all...] |
SelectionDAGISel.h | 277 SDNode *MorphNode(SDNode *Node, unsigned TargetOpc, SDVTList VTs,
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/external/llvm/include/llvm/Target/ |
TargetRegisterInfo.h | 44 const vt_iterator VTs; 104 for(int i = 0; VTs[i] != MVT::Other; ++i) 105 if (EVT(VTs[i]) == vt) 113 return VTs; 117 vt_iterator I = VTs;
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/external/llvm/utils/TableGen/ |
CodeGenRegisters.h | 195 std::vector<MVT::SimpleValueType> VTs; 210 const std::vector<MVT::SimpleValueType> &getValueTypes() const {return VTs;} 211 unsigned getNumValueTypes() const { return VTs.size(); } 214 if (VTNum < VTs.size()) 215 return VTs[VTNum];
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CallingConvEmitter.cpp | 70 ListInit *VTs = Action->getValueAsListInit("VTs"); 71 for (unsigned i = 0, e = VTs->getSize(); i != e; ++i) { 72 Record *VT = VTs->getElementAsRecord(i);
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DAGISelMatcher.cpp | 252 for (unsigned i = 0, e = VTs.size(); i != e; ++i) 253 OS << ' ' << getEnumName(VTs[i]); 317 return M->OpcodeName == OpcodeName && M->VTs == VTs &&
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DAGISelMatcherOpt.cpp | 132 const SmallVectorImpl<MVT::SimpleValueType> &VTs = EN->getVTList(); 135 VTs.data(), VTs.size(),
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DAGISelMatcher.h | [all...] |
CodeGenTarget.cpp | 228 for (unsigned ri = 0, re = RCs[i]->VTs.size(); ri != re; ++ri) 229 LegalValueTypes.push_back(RCs[i]->VTs[ri]);
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CodeGenRegisters.cpp | 478 VTs.push_back(getValueType(Type)); 480 assert(!VTs.empty() && "RegisterClass must contain at least one ValueType!"); 535 SpillSize = Size ? Size : EVT(VTs[0]).getSizeInBits(); 567 VTs = Super.VTs; [all...] |
RegisterInfoEmitter.cpp | 736 VTSeqs.add(RegisterClasses[rc]->VTs); 867 << "VTLists + " << VTSeqs.get(RC.VTs) << ",\n " [all...] |
/external/llvm/lib/Target/Sparc/ |
SparcISelLowering.cpp | [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCISelLowering.cpp | [all...] |
/external/llvm/lib/Target/MSP430/ |
MSP430ISelLowering.cpp | [all...] |
/external/llvm/lib/Target/X86/ |
X86ISelLowering.cpp | [all...] |
X86InstrInfo.cpp | [all...] |
X86ISelDAGToDAG.cpp | [all...] |
/external/llvm/lib/Target/Mips/ |
MipsISelLowering.cpp | [all...] |
/external/llvm/lib/Target/ARM/ |
ARMISelLowering.cpp | [all...] |