1 //===-- MipsMCTargetDesc.cpp - Mips Target Descriptions -------------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file provides Mips specific target descriptions. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #include "MipsMCAsmInfo.h" 15 #include "MipsMCTargetDesc.h" 16 #include "InstPrinter/MipsInstPrinter.h" 17 #include "llvm/MC/MachineLocation.h" 18 #include "llvm/MC/MCCodeGenInfo.h" 19 #include "llvm/MC/MCInstrInfo.h" 20 #include "llvm/MC/MCRegisterInfo.h" 21 #include "llvm/MC/MCStreamer.h" 22 #include "llvm/MC/MCSubtargetInfo.h" 23 #include "llvm/Support/ErrorHandling.h" 24 #include "llvm/Support/TargetRegistry.h" 25 26 #define GET_INSTRINFO_MC_DESC 27 #include "MipsGenInstrInfo.inc" 28 29 #define GET_SUBTARGETINFO_MC_DESC 30 #include "MipsGenSubtargetInfo.inc" 31 32 #define GET_REGINFO_MC_DESC 33 #include "MipsGenRegisterInfo.inc" 34 35 using namespace llvm; 36 37 static std::string ParseMipsTriple(StringRef TT, StringRef CPU) { 38 std::string MipsArchFeature; 39 size_t DashPosition = 0; 40 StringRef TheTriple; 41 42 // Let's see if there is a dash, like mips-unknown-linux. 43 DashPosition = TT.find('-'); 44 45 if (DashPosition == StringRef::npos) { 46 // No dash, we check the string size. 47 TheTriple = TT.substr(0); 48 } else { 49 // We are only interested in substring before dash. 50 TheTriple = TT.substr(0,DashPosition); 51 } 52 53 if (TheTriple == "mips" || TheTriple == "mipsel") { 54 if (CPU.empty() || CPU == "mips32") { 55 MipsArchFeature = "+mips32"; 56 } else if (CPU == "mips32r2") { 57 MipsArchFeature = "+mips32r2"; 58 } 59 } else { 60 if (CPU.empty() || CPU == "mips64") { 61 MipsArchFeature = "+mips64"; 62 } else if (CPU == "mips64r2") { 63 MipsArchFeature = "+mips64r2"; 64 } 65 } 66 return MipsArchFeature; 67 } 68 69 static MCInstrInfo *createMipsMCInstrInfo() { 70 MCInstrInfo *X = new MCInstrInfo(); 71 InitMipsMCInstrInfo(X); 72 return X; 73 } 74 75 static MCRegisterInfo *createMipsMCRegisterInfo(StringRef TT) { 76 MCRegisterInfo *X = new MCRegisterInfo(); 77 InitMipsMCRegisterInfo(X, Mips::RA); 78 return X; 79 } 80 81 static MCSubtargetInfo *createMipsMCSubtargetInfo(StringRef TT, StringRef CPU, 82 StringRef FS) { 83 std::string ArchFS = ParseMipsTriple(TT,CPU); 84 if (!FS.empty()) { 85 if (!ArchFS.empty()) 86 ArchFS = ArchFS + "," + FS.str(); 87 else 88 ArchFS = FS; 89 } 90 MCSubtargetInfo *X = new MCSubtargetInfo(); 91 InitMipsMCSubtargetInfo(X, TT, CPU, ArchFS); 92 return X; 93 } 94 95 static MCAsmInfo *createMipsMCAsmInfo(const Target &T, StringRef TT) { 96 MCAsmInfo *MAI = new MipsMCAsmInfo(T, TT); 97 98 MachineLocation Dst(MachineLocation::VirtualFP); 99 MachineLocation Src(Mips::SP, 0); 100 MAI->addInitialFrameState(0, Dst, Src); 101 102 return MAI; 103 } 104 105 static MCCodeGenInfo *createMipsMCCodeGenInfo(StringRef TT, Reloc::Model RM, 106 CodeModel::Model CM, 107 CodeGenOpt::Level OL) { 108 MCCodeGenInfo *X = new MCCodeGenInfo(); 109 if (CM == CodeModel::JITDefault) 110 RM = Reloc::Static; 111 else if (RM == Reloc::Default) 112 RM = Reloc::PIC_; 113 X->InitMCCodeGenInfo(RM, CM, OL); 114 return X; 115 } 116 117 static MCInstPrinter *createMipsMCInstPrinter(const Target &T, 118 unsigned SyntaxVariant, 119 const MCAsmInfo &MAI, 120 const MCInstrInfo &MII, 121 const MCRegisterInfo &MRI, 122 const MCSubtargetInfo &STI) { 123 return new MipsInstPrinter(MAI, MII, MRI); 124 } 125 126 static MCStreamer *createMCStreamer(const Target &T, StringRef TT, 127 MCContext &Ctx, MCAsmBackend &MAB, 128 raw_ostream &_OS, 129 MCCodeEmitter *_Emitter, 130 bool RelaxAll, 131 bool NoExecStack) { 132 Triple TheTriple(TT); 133 134 return createELFStreamer(Ctx, MAB, _OS, _Emitter, RelaxAll, NoExecStack); 135 } 136 137 extern "C" void LLVMInitializeMipsTargetMC() { 138 // Register the MC asm info. 139 RegisterMCAsmInfoFn X(TheMipsTarget, createMipsMCAsmInfo); 140 RegisterMCAsmInfoFn Y(TheMipselTarget, createMipsMCAsmInfo); 141 RegisterMCAsmInfoFn A(TheMips64Target, createMipsMCAsmInfo); 142 RegisterMCAsmInfoFn B(TheMips64elTarget, createMipsMCAsmInfo); 143 144 // Register the MC codegen info. 145 TargetRegistry::RegisterMCCodeGenInfo(TheMipsTarget, 146 createMipsMCCodeGenInfo); 147 TargetRegistry::RegisterMCCodeGenInfo(TheMipselTarget, 148 createMipsMCCodeGenInfo); 149 TargetRegistry::RegisterMCCodeGenInfo(TheMips64Target, 150 createMipsMCCodeGenInfo); 151 TargetRegistry::RegisterMCCodeGenInfo(TheMips64elTarget, 152 createMipsMCCodeGenInfo); 153 154 // Register the MC instruction info. 155 TargetRegistry::RegisterMCInstrInfo(TheMipsTarget, createMipsMCInstrInfo); 156 TargetRegistry::RegisterMCInstrInfo(TheMipselTarget, createMipsMCInstrInfo); 157 TargetRegistry::RegisterMCInstrInfo(TheMips64Target, createMipsMCInstrInfo); 158 TargetRegistry::RegisterMCInstrInfo(TheMips64elTarget, 159 createMipsMCInstrInfo); 160 161 // Register the MC register info. 162 TargetRegistry::RegisterMCRegInfo(TheMipsTarget, createMipsMCRegisterInfo); 163 TargetRegistry::RegisterMCRegInfo(TheMipselTarget, createMipsMCRegisterInfo); 164 TargetRegistry::RegisterMCRegInfo(TheMips64Target, createMipsMCRegisterInfo); 165 TargetRegistry::RegisterMCRegInfo(TheMips64elTarget, 166 createMipsMCRegisterInfo); 167 168 // Register the MC Code Emitter 169 TargetRegistry::RegisterMCCodeEmitter(TheMipsTarget, 170 createMipsMCCodeEmitterEB); 171 TargetRegistry::RegisterMCCodeEmitter(TheMipselTarget, 172 createMipsMCCodeEmitterEL); 173 TargetRegistry::RegisterMCCodeEmitter(TheMips64Target, 174 createMipsMCCodeEmitterEB); 175 TargetRegistry::RegisterMCCodeEmitter(TheMips64elTarget, 176 createMipsMCCodeEmitterEL); 177 178 // Register the object streamer. 179 TargetRegistry::RegisterMCObjectStreamer(TheMipsTarget, createMCStreamer); 180 TargetRegistry::RegisterMCObjectStreamer(TheMipselTarget, createMCStreamer); 181 TargetRegistry::RegisterMCObjectStreamer(TheMips64Target, createMCStreamer); 182 TargetRegistry::RegisterMCObjectStreamer(TheMips64elTarget, 183 createMCStreamer); 184 185 // Register the asm backend. 186 TargetRegistry::RegisterMCAsmBackend(TheMipsTarget, 187 createMipsAsmBackendEB32); 188 TargetRegistry::RegisterMCAsmBackend(TheMipselTarget, 189 createMipsAsmBackendEL32); 190 TargetRegistry::RegisterMCAsmBackend(TheMips64Target, 191 createMipsAsmBackendEB64); 192 TargetRegistry::RegisterMCAsmBackend(TheMips64elTarget, 193 createMipsAsmBackendEL64); 194 195 // Register the MC subtarget info. 196 TargetRegistry::RegisterMCSubtargetInfo(TheMipsTarget, 197 createMipsMCSubtargetInfo); 198 TargetRegistry::RegisterMCSubtargetInfo(TheMipselTarget, 199 createMipsMCSubtargetInfo); 200 TargetRegistry::RegisterMCSubtargetInfo(TheMips64Target, 201 createMipsMCSubtargetInfo); 202 TargetRegistry::RegisterMCSubtargetInfo(TheMips64elTarget, 203 createMipsMCSubtargetInfo); 204 205 // Register the MCInstPrinter. 206 TargetRegistry::RegisterMCInstPrinter(TheMipsTarget, 207 createMipsMCInstPrinter); 208 TargetRegistry::RegisterMCInstPrinter(TheMipselTarget, 209 createMipsMCInstPrinter); 210 TargetRegistry::RegisterMCInstPrinter(TheMips64Target, 211 createMipsMCInstPrinter); 212 TargetRegistry::RegisterMCInstPrinter(TheMips64elTarget, 213 createMipsMCInstPrinter); 214 } 215