| /external/kernel-headers/original/asm-mips/ |
| i8259.h | 58 irq = inb(PIC_MASTER_CMD) & 7;
65 irq = (inb(PIC_SLAVE_CMD) & 7) + 8;
77 if(~inb(PIC_MASTER_ISR) & 0x80)
|
| /external/grub/netboot/ |
| timer.h | 54 return ((inb(PPC_PORTB) & PPCB_T2OUT) == 0);
60 while ((inb(PPC_PORTB) & PPCB_T2OUT) == 0)
|
| timer.c | 16 outb((inb(PPC_PORTB) & ~PPCB_SPKR) | PPCB_T2GATE, PPC_PORTB);
50 outb((inb(0x61) & ~0x02) | 0x01, 0x61);
72 } while ((inb(0x61) & 0x20) == 0);
|
| ni5010.c | 175 printf("XSTAT %hhX ", inb(EDLC_XSTAT));
176 printf("XMASK %hhX ", inb(EDLC_XMASK));
177 printf("RSTAT %hhX ", inb(EDLC_RSTAT));
178 printf("RMASK %hhX ", inb(EDLC_RMASK));
179 printf("RMODE %hhX ", inb(EDLC_RMODE));
180 printf("XMODE %hhX ", inb(EDLC_XMODE));
181 printf("ISTAT %hhX\n", inb(IE_ISTAT));
225 if (((rcv_stat = inb(EDLC_RSTAT)) & RS_VALID_BITS) != RS_PKT_OK) {
272 while (((xmt_stat = inb(IE_ISTAT)) & IS_EN_XMT) != 0)
288 inb(IE_RBUF)
[all...] |
| tiara.c | 125 while ((inb(ioaddr + DLCR_RECV_MODE) & BUF_EMPTY) == 0)
126 inb(ioaddr + BMPR_MEM_PORT);
141 if (inb(ioaddr + DLCR_RECV_MODE) & BUF_EMPTY)
186 while (currticks() < time && (inb(ioaddr) & (TMT_OK|TMT_16COLL)) == 0)
188 if ((inb(ioaddr) & (TMT_OK|TMT_16COLL)) == 0)
210 nic->node_addr[i] = inb(ioaddr + PROM_ID + i);
|
| ns8390.c | 131 while((inb(eth_asic_base + _3COM_STREG) & _3COM_STREG_DPRDY) == 0)
140 *(dst++) = inb(eth_asic_base + ASIC_PIO);
180 while((inb(eth_asic_base + _3COM_STREG) & _3COM_STREG_DPRDY) == 0)
198 (inb(eth_nic_base + D8390_P0_ISR) & D8390_ISR_RDC)
204 while((inb(eth_nic_base + D8390_P0_ISR) & D8390_ISR_RDC)
363 inb(0x84);
367 inb(0x84);
369 inb(0x84);
379 inb(0x84);
383 inb(0x84)
[all...] |
| depca.c | 542 nicsr = inb(DEPCA_NICSR);
673 data = inb(DEPCA_PROM); /* clear counter on DEPCA */
674 data = inb(DEPCA_PROM); /* read data */
676 nicsr = inb(DEPCA_NICSR);
681 data = inb(DEPCA_PROM);
691 nicsr = ((inb(DEPCA_NICSR) & ~SHE & ~RBE & ~IEN) | IM);
702 sum += (u8)(nic->node_addr[i++] = inb(DEPCA_PROM));
703 sum += (u16)((nic->node_addr[i++] = inb(DEPCA_PROM)) << 8);
709 chksum = (u8)inb(DEPCA_PROM);
710 chksum |= (u16)(inb(DEPCA_PROM) << 8)
[all...] |
| via-rhine.c | 749 byMIIAdrbak = inb (byMIIAD);
750 byMIICRbak = inb (byMIICR);
757 outb (inb (byMIICR) | 0x40, byMIICR);
759 byMIItemp = inb (byMIICR);
764 byMIItemp = inb (byMIICR);
789 byMIIAdrbak = inb (byMIIAD);
791 byMIICRbak = inb (byMIICR);
797 outb (inb (byMIICR) | 0x40, byMIICR);
799 byMIItemp = inb (byMIICR);
804 byMIItemp = inb (byMIICR)
[all...] |
| sk_g16.c | 185 #define SK_ROM_ON (inb(SK_POS2) & POS2_CARD)
186 #define SK_ROM_OFF (inb(SK_POS2) | POS2_EPROM)
187 #define SK_RAM_ON (inb(SK_POS2) | POS2_CARD)
188 #define SK_RAM_OFF (inb(SK_POS2) & POS2_EPROM)
755 long offset1, offset0 = inb(ioaddr);
757 ((offset1 = inb(ioaddr + 1)) == SK_IDHIGH))
1110 unsigned char pos0 = inb(SK_POS0),
1111 pos1 = inb(SK_POS1),
1112 pos2 = inb(SK_POS2),
1113 pos3 = inb(SK_POS3)
[all...] |
| eepro.c | 42 #define SLOW_DOWN inb(0x80);
302 temp_reg = inb(ioaddr + eeprom_reg);
310 temp_reg = inb(ioaddr + REG1);
314 temp_reg = inb(ioaddr + REG2); /* match broadcast */
316 temp_reg = inb(ioaddr + REG3);
351 if ((inb(ioaddr + STATUS_REG) & 0x40) == 0)
364 inb(ioaddr + STATUS_REG));
488 retval = (retval << 1) | ((inb(ee_addr) & EEDO) ? 1 : 0);
511 id = inb(ioaddr + ID_REG);
515 if (((id = inb(ioaddr + ID_REG)) & R_ROBIN_BITS) != (counter + 0x40)
[all...] |
| rtl8139.c | 209 *ap++ = inb(ioaddr + MAC0 + i);
212 speed10 = inb(ioaddr + MediaStatus) & MSRSpeed10;
275 retval = (retval << 1) | ((inb(ee_addr) & EE_DATA_READ) ? 1 : 0);
296 while ((inb(ioaddr + ChipCmd) & CmdReset) != 0 && timer2_running())
395 if (inb(ioaddr + ChipCmd) & RxBufEmpty) {
456 while ((inb(ioaddr + ChipCmd) & CmdReset) != 0 && timer2_running())
|
| 3c595.c | 119 inb(BASE + VX_W1_TX_STATUS);
193 while(( status=inb(BASE + VX_W1_TX_STATUS) )& TXS_COMPLETE ) {
271 nic->packet[rx_fifo-1]=inb(BASE + VX_W1_RX_PIO_RD_1);
284 nic->packet[nic->packetlen+rx_fifo-1]=inb(BASE + VX_W1_RX_PIO_RD_1);
|
| /external/grub/stage2/ |
| serial.c | 66 inb (unsigned short port)
70 asm volatile ("inb %w1, %0" : "=a" (value) : "Nd" (port));
88 if (inb (serial_hw_port + UART_LSR) & UART_DATA_READY)
89 return inb (serial_hw_port + UART_RX);
101 while ((inb (serial_hw_port + UART_LSR) & UART_EMPTY_TRANSMITTER) == 0)
65 inb (unsigned short port) function
|
| /prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.4.3/sysroot/usr/include/linux/ |
| ps2esdi.h | 47 #define LITE_ON outb(inb(PORT_SYS_A) | ON,PORT_SYS_A)
48 #define LITE_OFF outb((inb(PORT_SYS_A) & OFF),PORT_SYS_A)
|
| /prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.6/sysroot/usr/include/linux/ |
| ps2esdi.h | 47 #define LITE_ON outb(inb(PORT_SYS_A) | ON,PORT_SYS_A)
48 #define LITE_OFF outb((inb(PORT_SYS_A) & OFF),PORT_SYS_A)
|
| /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.7-4.6/sysroot/usr/include/linux/ |
| ps2esdi.h | 47 #define LITE_ON outb(inb(PORT_SYS_A) | ON,PORT_SYS_A)
48 #define LITE_OFF outb((inb(PORT_SYS_A) & OFF),PORT_SYS_A)
|
| /bionic/libc/kernel/arch-x86/asm/ |
| dma_32.h | 31 #define dma_inb inb
|
| /development/ndk/platforms/android-9/arch-x86/include/asm/ |
| dma_32.h | 31 #define dma_inb inb
|
| /prebuilts/ndk/android-ndk-r4/platforms/android-5/arch-x86/usr/include/asm/ |
| dma_32.h | 25 #define dma_inb inb
|
| /prebuilts/ndk/android-ndk-r4/platforms/android-8/arch-x86/usr/include/asm/ |
| dma_32.h | 25 #define dma_inb inb
|
| /prebuilts/ndk/android-ndk-r6/platforms/android-9/arch-x86/usr/include/asm/ |
| dma_32.h | 25 #define dma_inb inb
|
| /prebuilts/ndk/android-ndk-r7/platforms/android-14/arch-x86/usr/include/asm/ |
| dma_32.h | 25 #define dma_inb inb
|
| /prebuilts/ndk/android-ndk-r7/platforms/android-9/arch-x86/usr/include/asm/ |
| dma_32.h | 25 #define dma_inb inb
|
| /bionic/libc/kernel/arch-mips/asm/ |
| dma.h | 32 #define dma_inb inb
|
| /development/ndk/platforms/android-9/arch-mips/include/asm/ |
| dma.h | 32 #define dma_inb inb
|
