| /external/llvm/lib/CodeGen/ |
| MachineInstrBundle.cpp | 160 if (MO.isDead()) {
166 if (!MO.isDead())
171 if (!MO.isDead()) {
189 bool isDead = DeadDefSet.count(Reg) || KilledDefSet.count(Reg);
190 MIB.addReg(Reg, getDefRegState(true) | getDeadRegState(isDead) |
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| DeadMachineInstructionElim.cpp | 45 bool isDead(const MachineInstr *MI) const;
54 bool DeadMachineInstructionElim::isDead(const MachineInstr *MI) const {
131 if (isDead(MI)) {
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| ExpandPostRAPseudos.cpp | 135 if (MI->getOperand(0).isDead())
156 if (DstMO.isDead() || SrcMO.isUndef() || MI->getNumOperands() > 2) {
172 if (DstMO.isDead())
|
| MachineInstr.cpp | 157 bool isKill, bool isDead, bool isUndef,
180 IsDead = isDead;
246 if (isDef() || isKill() || isDead() || isImplicit() || isUndef() ||
263 if (isKill() || isDead() || isUndef() || isInternalRead()) {
270 if (isDead()) {
817 if (Check == CheckKillDead && MO.isDead() != OMO.isDead())
[all...] |
| PHIElimination.cpp | 204 bool isDead = MPhi->getOperand(0).isDead();
273 if (isDead) {
|
| TailDuplication.cpp | 93 void UpdateSuccessorsPHIs(MachineBasicBlock *FromBB, bool isDead,
208 bool isDead = MBB->pred_empty() && !MBB->hasAddressTaken();
210 UpdateSuccessorsPHIs(MBB, isDead, TDBBs, Succs);
213 if (isDead) {
443 TailDuplicatePass::UpdateSuccessorsPHIs(MachineBasicBlock *FromBB, bool isDead,
465 if (isDead) {
[all...] |
| RegAllocFast.cpp | 635 } else if (MO.isDead()) {
646 } else if (MO.isDead()) {
664 return MO.isKill() || MO.isDead();
677 return MO.isDead();
[all...] |
| VirtRegMap.cpp | 158 if (MO.isDead())
|
| LiveIntervalAnalysis.cpp | 318 if (MO.isDead())
377 if (MO.isDead()) {
[all...] |
| TwoAddressInstructionPass.cpp | 827 if (MO.isDef() && !MO.isDead())
[all...] |
| MachineVerifier.cpp | 831 if (MO->isDead())
[all...] |
| RegisterScavenging.cpp | 169 if (!isPred && MO.isDead())
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| LiveInterval.cpp | 308 bool isDead = true;
311 isDead = false;
314 if (isDead) {
|
| RegisterCoalescer.cpp | 817 assert(MO.isDef() && MO.isImplicit() && MO.isDead() &&
[all...] |
| MachineLICM.cpp | 450 if (!MO.isDead())
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| MachineOperand.h | 68 /// IsDef/IsImp/IsKill/IsDead flags - These are only valid for MO_Register
83 /// IsDead - True if this register is never used by a subsequent instruction.
85 bool IsDead : 1;
262 bool isDead() const {
264 return IsDead;
362 IsDead = Val;
503 /// operand. Note: This method ignores isKill and isDead properties.
515 bool isKill = false, bool isDead = false,
541 bool isKill = false, bool isDead = false,
550 Op.IsDead = isDead
[all...] |
| MachineInstr.h | 709 /// the specified register or -1 if it is not found. If isDead is true, defs
715 bool isDead = false, bool Overlap = false,
720 MachineOperand *findRegisterDefOperand(unsigned Reg, bool isDead = false,
722 int Idx = findRegisterDefOperandIdx(Reg, isDead, false, TRI);
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMBaseInstrInfo.h | 313 bool isDead = false) {
314 return MIB.addReg(ARM::CPSR, getDefRegState(true) | getDeadRegState(isDead));
|
| Thumb2SizeReduction.cpp | 659 if (HasCC && MI->getOperand(NumOps-1).isDead())
750 if (HasCC && MI->getOperand(NumOps-1).isDead())
819 if (!MO.isDead())
[all...] |
| ARMExpandPseudoInsts.cpp | 387 bool DstIsDead = MI.getOperand(OpIdx).isDead();
518 DstIsDead = MI.getOperand(OpIdx).isDead();
617 bool DstIsDead = MI.getOperand(0).isDead();
[all...] |
| MLxExpansionPass.cpp | 210 bool DstDead = MI->getOperand(0).isDead();
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonPeephole.cpp | 273 Src.isKill(), Src.isDead(), Src.isUndef(),
|
| /external/smali/dexlib/src/main/java/org/jf/dexlib/Code/Analysis/ |
| AnalyzedInstruction.java | 142 public boolean isDead() {
|
| /external/llvm/lib/Target/X86/ |
| X86InstrInfo.cpp | [all...] |
| /frameworks/base/services/java/com/android/server/am/ |
| BroadcastQueue.java | 494 boolean isDead;
496 isDead = (mService.mPidsSelfLocked.get(
499 if (!isDead) {
[all...] |
