| /external/webkit/Source/JavaScriptCore/assembler/ |
| MacroAssemblerMIPS.h | 154 lui addrTemp, (offset + 0x8000) >> 16
161 m_assembler.lui(addrTempRegister, (address.offset + 0x8000) >> 16);
196 lui addrTemp, (offset + 0x8000) >> 16
202 m_assembler.lui(addrTempRegister, (dest.offset + 0x8000) >> 16);
385 lui addrTemp, (offset + 0x8000) >> 16
392 m_assembler.lui(addrTempRegister, (address.offset + 0x8000) >> 16);
474 lui addrTemp, (offset + 0x8000) >> 16
478 m_assembler.lui(addrTempRegister, (address.offset + 0x8000) >> 16);
491 lui addrTemp, (offset + 0x8000) >> 16
495 m_assembler.lui(addrTempRegister, (address.offset + 0x8000) >> 16)
[all...] |
| MIPSAssembler.h | 257 lui(dest, imm >> 16);
263 void lui(RegisterID rt, int imm) function in class:JSC::MIPSAssembler
771 ASSERT((*insn & 0xffe00000) == 0x3c000000); // lui
804 ASSERT((*insn & 0xffe00000) == 0x3c000000); // lui
841 /* lui */
848 } else if ((*insn & 0xffe00000) == 0x3c000000) { // lui
853 /* lui */
893 lui $25, target >> 16
924 /* lui */
949 /* lui $25, (to >> 16) & 0xffff *
[all...] |
| /external/openssl/crypto/sha/asm/ |
| sha1-mips.pl | 288 lui $K,0x5a82
295 lui $K,0x6ed9
300 lui $K,0x8f1b
305 lui $K,0xca62
|
| sha1-mips.s | 40 lui $31,0x5a82
507 lui $31,0x6ed9
869 lui $31,0x8f1b
1271 lui $31,0xca62
|
| /external/v8/test/cctest/ |
| test-disasm-mips.cc | 220 COMPARE(lui(a0, 0x1),
221 "3c040001 lui a0, 0x1");
222 COMPARE(lui(v0, 0xffff),
223 "3c02ffff lui v0, 0xffff");
|
| test-assembler-mips.cc | 136 // Test lui, ori, and addiu, used in the li pseudo-instruction.
140 __ lui(t0, 0x1234);
216 __ lui(v1, 0x8123); // 0x81230000
517 __ lui(t5, 0x3333);
[all...] |
| /external/v8/src/mips/ |
| disasm-mips.cc | 867 case LUI:
868 Format(instr, "lui 'rt, 'imm16x");
|
| assembler-mips.cc | 182 // specially coded on MIPS means that it is a lui/ori instruction, and that is
567 return opcode == LUI;
1449 void Assembler::lui(Register rd, int32_t j) { function in class:v8::Assembler
[all...] |
| assembler-mips.h | 577 // has already deserialized the lui/ori instructions etc.
598 // Here we are patching the address in the LUI/ORI instruction pair.
609 // the instruction that follows LUI/ORI instruction pair. Now, with new jump
611 // follows LUI/ORI pair is substituted with J/JAL, this constant equals
612 // to 3 instructions (LUI+ORI+J/JAL/JR/JALR).
726 void lui(Register rd, int32_t j);
[all...] |
| macro-assembler-mips.cc | 783 lui(rd, (j.imm32_ >> kLuiShift) & kImm16Mask);
785 lui(rd, (j.imm32_ >> kLuiShift) & kImm16Mask);
794 lui(rd, (j.imm32_ >> kLuiShift) & kImm16Mask);
[all...] |
| /external/openssl/crypto/aes/asm/ |
| aes-mips.s | 941 lui $2,0x8080
946 lui $25,0x1b1b
|
| aes-mips.pl | 1158 lui $x80808080,0x8080
1163 lui $x1b1b1b1b,0x1b1b
[all...] |
