| /external/valgrind/main/memcheck/ |
| mc_machine.c | 632 if (o >= GOF(FPREG[0])
633 && o+sz <= GOF(FPREG[0])+SZB(FPREG[0])) return GOF(FPREG[0]);
634 if (o >= GOF(FPREG[1])
635 && o+sz <= GOF(FPREG[1])+SZB(FPREG[1])) return GOF(FPREG[1]);
636 if (o >= GOF(FPREG[2])
637 && o+sz <= GOF(FPREG[2])+SZB(FPREG[2])) return GOF(FPREG[2])
[all...] |
| /dalvik/vm/compiler/codegen/arm/Thumb2/ |
| Factory.cpp | 142 if (FPREG(rDest)) {
699 if (FPREG(rDestLo) && (encodedImm >= 0)) {
722 if (FPREG(rDest)) {
786 if (FPREG(rSrc)) {
856 if (FPREG(rDest)) {
858 assert(FPREG(rDestHi));
876 if (FPREG(rDest)) {
[all...] |
| /external/libffi/src/ia64/ |
| ffi.c | 48 } fpreg; typedef in typeref:struct:__anon8282
55 fpreg fp_regs[8]; /* Contents of 8 fp arg registers. */
110 hfa_type_load (fpreg *fpaddr, int type, void *addr)
132 hfa_type_store (int type, void *addr, fpreg *fpaddr)
490 fpreg *addr = &stack->fp_regs[fpcount++];
504 fpreg *addr = &stack->fp_regs[fpcount++];
520 fpreg *addr = &stack->fp_regs[fpcount++];
|
| /external/libffi/src/pa/ |
| ffi.c | 41 #define fldw(addr, fpreg) \
42 __asm__ volatile ("fldw 0(%0), %%" #fpreg "L" : : "r"(addr) : #fpreg)
43 #define fstw(fpreg, addr) \
44 __asm__ volatile ("fstw %%" #fpreg "L, 0(%0)" : : "r"(addr))
45 #define fldd(addr, fpreg) \
46 __asm__ volatile ("fldd 0(%0), %%" #fpreg : : "r"(addr) : #fpreg)
47 #define fstd(fpreg, addr) \
48 __asm__ volatile ("fstd %%" #fpreg "L, 0(%0)" : : "r"(addr)
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonFrameLowering.cpp | 120 unsigned FPReg = QRI->getFrameRegister();
124 MachineLocation Src(FPReg, -8);
133 MachineLocation SPDst(FPReg, -8);
134 MachineLocation SPSrc(FPReg);
|
| HexagonRegisterInfo.cpp | 300 unsigned FPReg = getFrameRegister();
302 MachineLocation Src(FPReg, 0);
|
| /dalvik/vm/compiler/codegen/ |
| RallocUtil.cpp | 611 return !FPREG(reg);
613 return FPREG(reg);
709 match = match && (FPREG(infoLo->reg) == FPREG(infoHi->reg));
711 if (match && FPREG(infoLo->reg)) {
727 assert(!FPREG(loc.lowReg) || ((loc.lowReg & 0x1) == 0));
758 assert(FPREG(loc.lowReg) == FPREG(loc.highReg));
759 assert(!FPREG(loc.lowReg) || ((loc.lowReg & 0x1) == 0));
774 assert(!FPREG(loc.lowReg) || ((loc.lowReg & 0x1) == 0))
[all...] |
| CodegenFactory.cpp | 212 assert(FPREG(rlSrc.lowReg)==FPREG(rlSrc.highReg));
|
| /external/webkit/Source/JavaScriptCore/dfg/ |
| DFGJITCodeGenerator.cpp | 168 JITCompiler::FPRegisterID fpReg = JITCompiler::fprToRegisterID(fpr);
178 m_jit.movePtrToDouble(tempReg, fpReg);
183 m_jit.convertInt32ToDouble(jsValueReg, fpReg);
200 JITCompiler::FPRegisterID fpReg = JITCompiler::fprToRegisterID(fpr);
202 m_jit.convertInt32ToDouble(reg, fpReg);
|
| DFGNonSpeculativeJIT.cpp | 67 JITCompiler::FPRegisterID fpReg = JITCompiler::fprToRegisterID(fpr);
76 m_jit.movePtrToDouble(tempReg, fpReg);
85 m_jit.moveDouble(JITCompiler::fpReturnValueRegister, fpReg);
91 m_jit.convertInt32ToDouble(jsValueReg, fpReg);
124 JITCompiler::FPRegisterID fpReg = JITCompiler::fprToRegisterID(fpr);
127 JITCompiler::Jump truncatedToInteger = m_jit.branchTruncateDoubleToInt32(fpReg, reg, JITCompiler::BranchIfTruncateSuccessful);
131 m_jit.moveDouble(fpReg, JITCompiler::fpArgumentRegister0);
|
| DFGJITCodeGenerator.h | 161 JITCompiler::FPRegisterID fpReg = JITCompiler::fprToRegisterID(fpr);
163 m_jit.moveDoubleToPtr(fpReg, reg);
170 JITCompiler::FPRegisterID fpReg = JITCompiler::fprToRegisterID(fpr);
172 m_jit.movePtrToDouble(reg, fpReg);
[all...] |
| /dalvik/vm/compiler/codegen/arm/FP/ |
| Thumb2VFP.cpp | 254 assert(!FPREG(rlResult.lowReg));
|
| /external/valgrind/main/VEX/useful/ |
| show_fp_state.c | 99 printf ( " %s fpreg%d: 0x",
|
| x87_to_vex_and_back.c | 230 printf ( " %s fpreg%d: 0x",
|
| hd_fpu.c | 513 printf ( " %s fpreg%d: 0x",
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86FloatingPoint.cpp | [all...] |
| X86FrameLowering.cpp | [all...] |
| /external/llvm/lib/MC/ |
| MCAsmStreamer.cpp | 249 virtual void EmitSetFP(unsigned FpReg, unsigned SpReg, int64_t Offset = 0);
[all...] |
| MCStreamer.cpp | 631 void MCStreamer::EmitSetFP(unsigned FpReg, unsigned SpReg, int64_t Offset) {
|
| /dalvik/vm/compiler/codegen/arm/ |
| CodegenCommon.cpp | 103 shift = FPREG(reg) ? kFPReg0 : 0;
|
| ArmLIR.h | 70 #define FPREG(x) ((x & FP_REG_OFFSET) == FP_REG_OFFSET)
73 #define SINGLEREG(x) (FPREG(x) && !DOUBLEREG(x))
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCFrameLowering.cpp | 665 unsigned FPReg = isPPC64 ? PPC::X31 : PPC::R31;
683 .addReg(FPReg)
[all...] |
| PPCISelLowering.cpp | [all...] |
| /external/llvm/include/llvm/MC/ |
| MCStreamer.h | 599 virtual void EmitSetFP(unsigned FpReg, unsigned SpReg, int64_t Offset = 0);
|
| /prebuilts/gcc/linux-x86/arm/arm-eabi-4.6/bin/ |
| arm-eabi-readelf | |
