1 /**************************************************************************** 2 **************************************************************************** 3 *** 4 *** This header was automatically generated from a Linux kernel header 5 *** of the same name, to make information necessary for userspace to 6 *** call into the kernel available to libc. It contains only constants, 7 *** structures, and macros generated from the original header, and thus, 8 *** contains no copyrightable information. 9 *** 10 *** To edit the content of this header, modify the corresponding 11 *** source file (e.g. under external/kernel-headers/original/) then 12 *** run bionic/libc/kernel/tools/update_all.py 13 *** 14 *** Any manual change here will be lost the next time this script will 15 *** be run. You've been warned! 16 *** 17 **************************************************************************** 18 ****************************************************************************/ 19 #ifndef __ASM_ARCH_OMAP_MCBSP_H 20 #define __ASM_ARCH_OMAP_MCBSP_H 21 #include <asm/hardware.h> 22 #define OMAP730_MCBSP1_BASE 0xfffb1000 23 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 24 #define OMAP730_MCBSP2_BASE 0xfffb1800 25 #define OMAP1510_MCBSP1_BASE 0xe1011800 26 #define OMAP1510_MCBSP2_BASE 0xfffb1000 27 #define OMAP1510_MCBSP3_BASE 0xe1017000 28 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 29 #define OMAP1610_MCBSP1_BASE 0xe1011800 30 #define OMAP1610_MCBSP2_BASE 0xfffb1000 31 #define OMAP1610_MCBSP3_BASE 0xe1017000 32 #define OMAP24XX_MCBSP1_BASE 0x48074000 33 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 34 #define OMAP24XX_MCBSP2_BASE 0x48076000 35 #define OMAP_MCBSP_READ(base, reg) __raw_readw((base) + OMAP_MCBSP_REG_##reg) 36 #define OMAP_MCBSP_WRITE(base, reg, val) __raw_writew((val), (base) + OMAP_MCBSP_REG_##reg) 37 #define RRST 0x0001 38 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 39 #define RRDY 0x0002 40 #define RFULL 0x0004 41 #define RSYNC_ERR 0x0008 42 #define RINTM(value) ((value)<<4) 43 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 44 #define ABIS 0x0040 45 #define DXENA 0x0080 46 #define CLKSTP(value) ((value)<<11) 47 #define RJUST(value) ((value)<<13) 48 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 49 #define DLB 0x8000 50 #define XRST 0x0001 51 #define XRDY 0x0002 52 #define XEMPTY 0x0004 53 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 54 #define XSYNC_ERR 0x0008 55 #define XINTM(value) ((value)<<4) 56 #define GRST 0x0040 57 #define FRST 0x0080 58 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 59 #define SOFT 0x0100 60 #define FREE 0x0200 61 #define CLKRP 0x0001 62 #define CLKXP 0x0002 63 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 64 #define FSRP 0x0004 65 #define FSXP 0x0008 66 #define DR_STAT 0x0010 67 #define DX_STAT 0x0020 68 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 69 #define CLKS_STAT 0x0040 70 #define SCLKME 0x0080 71 #define CLKRM 0x0100 72 #define CLKXM 0x0200 73 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 74 #define FSRM 0x0400 75 #define FSXM 0x0800 76 #define RIOEN 0x1000 77 #define XIOEN 0x2000 78 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 79 #define IDLE_EN 0x4000 80 #define RWDLEN1(value) ((value)<<5) 81 #define RFRLEN1(value) ((value)<<8) 82 #define XWDLEN1(value) ((value)<<5) 83 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 84 #define XFRLEN1(value) ((value)<<8) 85 #define RDATDLY(value) (value) 86 #define RFIG 0x0004 87 #define RCOMPAND(value) ((value)<<3) 88 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 89 #define RWDLEN2(value) ((value)<<5) 90 #define RFRLEN2(value) ((value)<<8) 91 #define RPHASE 0x8000 92 #define XDATDLY(value) (value) 93 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 94 #define XFIG 0x0004 95 #define XCOMPAND(value) ((value)<<3) 96 #define XWDLEN2(value) ((value)<<5) 97 #define XFRLEN2(value) ((value)<<8) 98 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 99 #define XPHASE 0x8000 100 #define CLKGDV(value) (value) 101 #define FWID(value) ((value)<<8) 102 #define FPER(value) (value) 103 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 104 #define FSGM 0x1000 105 #define CLKSM 0x2000 106 #define CLKSP 0x4000 107 #define GSYNC 0x8000 108 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 109 #define RMCM 0x0001 110 #define RCBLK(value) ((value)<<2) 111 #define RPABLK(value) ((value)<<5) 112 #define RPBBLK(value) ((value)<<7) 113 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 114 #define XMCM(value) (value) 115 #define XCBLK(value) ((value)<<2) 116 #define XPABLK(value) ((value)<<5) 117 #define XPBBLK(value) ((value)<<7) 118 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 119 struct omap_mcbsp_reg_cfg { 120 u16 spcr2; 121 u16 spcr1; 122 u16 rcr2; 123 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 124 u16 rcr1; 125 u16 xcr2; 126 u16 xcr1; 127 u16 srgr2; 128 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 129 u16 srgr1; 130 u16 mcr2; 131 u16 mcr1; 132 u16 pcr0; 133 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 134 u16 rcerc; 135 u16 rcerd; 136 u16 xcerc; 137 u16 xcerd; 138 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 139 u16 rcere; 140 u16 rcerf; 141 u16 xcere; 142 u16 xcerf; 143 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 144 u16 rcerg; 145 u16 rcerh; 146 u16 xcerg; 147 u16 xcerh; 148 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 149 }; 150 typedef enum { 151 OMAP_MCBSP1 = 0, 152 OMAP_MCBSP2, 153 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 154 OMAP_MCBSP3, 155 } omap_mcbsp_id; 156 typedef int __bitwise omap_mcbsp_io_type_t; 157 #define OMAP_MCBSP_IRQ_IO ((__force omap_mcbsp_io_type_t) 1) 158 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 159 #define OMAP_MCBSP_POLL_IO ((__force omap_mcbsp_io_type_t) 2) 160 typedef enum { 161 OMAP_MCBSP_WORD_8 = 0, 162 OMAP_MCBSP_WORD_12, 163 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 164 OMAP_MCBSP_WORD_16, 165 OMAP_MCBSP_WORD_20, 166 OMAP_MCBSP_WORD_24, 167 OMAP_MCBSP_WORD_32, 168 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 169 } omap_mcbsp_word_length; 170 typedef enum { 171 OMAP_MCBSP_CLK_RISING = 0, 172 OMAP_MCBSP_CLK_FALLING, 173 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 174 } omap_mcbsp_clk_polarity; 175 typedef enum { 176 OMAP_MCBSP_FS_ACTIVE_HIGH = 0, 177 OMAP_MCBSP_FS_ACTIVE_LOW, 178 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 179 } omap_mcbsp_fs_polarity; 180 typedef enum { 181 OMAP_MCBSP_CLK_STP_MODE_NO_DELAY = 0, 182 OMAP_MCBSP_CLK_STP_MODE_DELAY, 183 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 184 } omap_mcbsp_clk_stp_mode; 185 typedef enum { 186 OMAP_MCBSP_SPI_MASTER = 0, 187 OMAP_MCBSP_SPI_SLAVE, 188 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 189 } omap_mcbsp_spi_mode; 190 struct omap_mcbsp_spi_cfg { 191 omap_mcbsp_spi_mode spi_mode; 192 omap_mcbsp_clk_polarity rx_clock_polarity; 193 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 194 omap_mcbsp_clk_polarity tx_clock_polarity; 195 omap_mcbsp_fs_polarity fsx_polarity; 196 u8 clk_div; 197 omap_mcbsp_clk_stp_mode clk_stp_mode; 198 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 199 omap_mcbsp_word_length word_length; 200 }; 201 #endif 202
