1 /**************************************************************************** 2 **************************************************************************** 3 *** 4 *** This header was automatically generated from a Linux kernel header 5 *** of the same name, to make information necessary for userspace to 6 *** call into the kernel available to libc. It contains only constants, 7 *** structures, and macros generated from the original header, and thus, 8 *** contains no copyrightable information. 9 *** 10 *** To edit the content of this header, modify the corresponding 11 *** source file (e.g. under external/kernel-headers/original/) then 12 *** run bionic/libc/kernel/tools/update_all.py 13 *** 14 *** Any manual change here will be lost the next time this script will 15 *** be run. You've been warned! 16 *** 17 **************************************************************************** 18 ****************************************************************************/ 19 #ifndef _LINUX_SPI_CPCAP_H 20 #define _LINUX_SPI_CPCAP_H 21 #include <linux/ioctl.h> 22 #define CPCAP_DEV_NAME "cpcap" 23 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 24 #define CPCAP_NUM_REG_CPCAP (CPCAP_REG_END - CPCAP_REG_START + 1) 25 #define CPCAP_IRQ_INT1_INDEX 0 26 #define CPCAP_IRQ_INT2_INDEX 16 27 #define CPCAP_IRQ_INT3_INDEX 32 28 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 29 #define CPCAP_IRQ_INT4_INDEX 48 30 #define CPCAP_IRQ_INT5_INDEX 64 31 #define CPCAP_HWCFG_NUM 2 32 #define CPCAP_HWCFG0_SEC_STBY_SW1 0x0001 33 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 34 #define CPCAP_HWCFG0_SEC_STBY_SW2 0x0002 35 #define CPCAP_HWCFG0_SEC_STBY_SW3 0x0004 36 #define CPCAP_HWCFG0_SEC_STBY_SW4 0x0008 37 #define CPCAP_HWCFG0_SEC_STBY_SW5 0x0010 38 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 39 #define CPCAP_HWCFG0_SEC_STBY_VAUDIO 0x0020 40 #define CPCAP_HWCFG0_SEC_STBY_VCAM 0x0040 41 #define CPCAP_HWCFG0_SEC_STBY_VCSI 0x0080 42 #define CPCAP_HWCFG0_SEC_STBY_VDAC 0x0100 43 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 44 #define CPCAP_HWCFG0_SEC_STBY_VDIG 0x0200 45 #define CPCAP_HWCFG0_SEC_STBY_VHVIO 0x0400 46 #define CPCAP_HWCFG0_SEC_STBY_VPLL 0x0800 47 #define CPCAP_HWCFG0_SEC_STBY_VRF1 0x1000 48 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 49 #define CPCAP_HWCFG0_SEC_STBY_VRF2 0x2000 50 #define CPCAP_HWCFG0_SEC_STBY_VRFREF 0x4000 51 #define CPCAP_HWCFG0_SEC_STBY_VSDIO 0x8000 52 #define CPCAP_HWCFG1_SEC_STBY_VWLAN1 0x0001 53 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 54 #define CPCAP_HWCFG1_SEC_STBY_VWLAN2 0x0002 55 #define CPCAP_HWCFG1_SEC_STBY_VSIM 0x0004 56 #define CPCAP_HWCFG1_SEC_STBY_VSIMCARD 0x0008 57 #define CPCAP_WHISPER_MODE_PU 0x00000001 58 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 59 #define CPCAP_WHISPER_ENABLE_UART 0x00000002 60 #define CPCAP_WHISPER_ACCY_MASK 0xF8000000 61 #define CPCAP_WHISPER_ACCY_SHFT 27 62 #define CPCAP_WHISPER_ID_SIZE 16 63 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 64 #define CPCAP_WHISPER_PROP_SIZE 7 65 enum cpcap_regulator_id { 66 CPCAP_SW2, 67 CPCAP_SW4, 68 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 69 CPCAP_SW5, 70 CPCAP_VCAM, 71 CPCAP_VCSI, 72 CPCAP_VDAC, 73 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 74 CPCAP_VDIG, 75 CPCAP_VFUSE, 76 CPCAP_VHVIO, 77 CPCAP_VSDIO, 78 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 79 CPCAP_VPLL, 80 CPCAP_VRF1, 81 CPCAP_VRF2, 82 CPCAP_VRFREF, 83 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 84 CPCAP_VWLAN1, 85 CPCAP_VWLAN2, 86 CPCAP_VSIM, 87 CPCAP_VSIMCARD, 88 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 89 CPCAP_VVIB, 90 CPCAP_VUSB, 91 CPCAP_VAUDIO, 92 CPCAP_NUM_REGULATORS 93 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 94 }; 95 enum cpcap_reg { 96 CPCAP_REG_START, 97 CPCAP_REG_INT1 = CPCAP_REG_START, 98 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 99 CPCAP_REG_INT2, 100 CPCAP_REG_INT3, 101 CPCAP_REG_INT4, 102 CPCAP_REG_INTM1, 103 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 104 CPCAP_REG_INTM2, 105 CPCAP_REG_INTM3, 106 CPCAP_REG_INTM4, 107 CPCAP_REG_INTS1, 108 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 109 CPCAP_REG_INTS2, 110 CPCAP_REG_INTS3, 111 CPCAP_REG_INTS4, 112 CPCAP_REG_ASSIGN1, 113 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 114 CPCAP_REG_ASSIGN2, 115 CPCAP_REG_ASSIGN3, 116 CPCAP_REG_ASSIGN4, 117 CPCAP_REG_ASSIGN5, 118 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 119 CPCAP_REG_ASSIGN6, 120 CPCAP_REG_VERSC1, 121 CPCAP_REG_VERSC2, 122 CPCAP_REG_MI1, 123 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 124 CPCAP_REG_MIM1, 125 CPCAP_REG_MI2, 126 CPCAP_REG_MIM2, 127 CPCAP_REG_UCC1, 128 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 129 CPCAP_REG_UCC2, 130 CPCAP_REG_PC1, 131 CPCAP_REG_PC2, 132 CPCAP_REG_BPEOL, 133 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 134 CPCAP_REG_PGC, 135 CPCAP_REG_MT1, 136 CPCAP_REG_MT2, 137 CPCAP_REG_MT3, 138 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 139 CPCAP_REG_PF, 140 CPCAP_REG_SCC, 141 CPCAP_REG_SW1, 142 CPCAP_REG_SW2, 143 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 144 CPCAP_REG_UCTM, 145 CPCAP_REG_TOD1, 146 CPCAP_REG_TOD2, 147 CPCAP_REG_TODA1, 148 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 149 CPCAP_REG_TODA2, 150 CPCAP_REG_DAY, 151 CPCAP_REG_DAYA, 152 CPCAP_REG_VAL1, 153 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 154 CPCAP_REG_VAL2, 155 CPCAP_REG_SDVSPLL, 156 CPCAP_REG_SI2CC1, 157 CPCAP_REG_Si2CC2, 158 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 159 CPCAP_REG_S1C1, 160 CPCAP_REG_S1C2, 161 CPCAP_REG_S2C1, 162 CPCAP_REG_S2C2, 163 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 164 CPCAP_REG_S3C, 165 CPCAP_REG_S4C1, 166 CPCAP_REG_S4C2, 167 CPCAP_REG_S5C, 168 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 169 CPCAP_REG_S6C, 170 CPCAP_REG_VCAMC, 171 CPCAP_REG_VCSIC, 172 CPCAP_REG_VDACC, 173 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 174 CPCAP_REG_VDIGC, 175 CPCAP_REG_VFUSEC, 176 CPCAP_REG_VHVIOC, 177 CPCAP_REG_VSDIOC, 178 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 179 CPCAP_REG_VPLLC, 180 CPCAP_REG_VRF1C, 181 CPCAP_REG_VRF2C, 182 CPCAP_REG_VRFREFC, 183 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 184 CPCAP_REG_VWLAN1C, 185 CPCAP_REG_VWLAN2C, 186 CPCAP_REG_VSIMC, 187 CPCAP_REG_VVIBC, 188 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 189 CPCAP_REG_VUSBC, 190 CPCAP_REG_VUSBINT1C, 191 CPCAP_REG_VUSBINT2C, 192 CPCAP_REG_URT, 193 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 194 CPCAP_REG_URM1, 195 CPCAP_REG_URM2, 196 CPCAP_REG_VAUDIOC, 197 CPCAP_REG_CC, 198 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 199 CPCAP_REG_CDI, 200 CPCAP_REG_SDAC, 201 CPCAP_REG_SDACDI, 202 CPCAP_REG_TXI, 203 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 204 CPCAP_REG_TXMP, 205 CPCAP_REG_RXOA, 206 CPCAP_REG_RXVC, 207 CPCAP_REG_RXCOA, 208 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 209 CPCAP_REG_RXSDOA, 210 CPCAP_REG_RXEPOA, 211 CPCAP_REG_RXLL, 212 CPCAP_REG_A2LA, 213 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 214 CPCAP_REG_MIPIS1, 215 CPCAP_REG_MIPIS2, 216 CPCAP_REG_MIPIS3, 217 CPCAP_REG_LVAB, 218 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 219 CPCAP_REG_CCC1, 220 CPCAP_REG_CRM, 221 CPCAP_REG_CCCC2, 222 CPCAP_REG_CCS1, 223 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 224 CPCAP_REG_CCS2, 225 CPCAP_REG_CCA1, 226 CPCAP_REG_CCA2, 227 CPCAP_REG_CCM, 228 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 229 CPCAP_REG_CCO, 230 CPCAP_REG_CCI, 231 CPCAP_REG_ADCC1, 232 CPCAP_REG_ADCC2, 233 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 234 CPCAP_REG_ADCD0, 235 CPCAP_REG_ADCD1, 236 CPCAP_REG_ADCD2, 237 CPCAP_REG_ADCD3, 238 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 239 CPCAP_REG_ADCD4, 240 CPCAP_REG_ADCD5, 241 CPCAP_REG_ADCD6, 242 CPCAP_REG_ADCD7, 243 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 244 CPCAP_REG_ADCAL1, 245 CPCAP_REG_ADCAL2, 246 CPCAP_REG_USBC1, 247 CPCAP_REG_USBC2, 248 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 249 CPCAP_REG_USBC3, 250 CPCAP_REG_UVIDL, 251 CPCAP_REG_UVIDH, 252 CPCAP_REG_UPIDL, 253 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 254 CPCAP_REG_UPIDH, 255 CPCAP_REG_UFC1, 256 CPCAP_REG_UFC2, 257 CPCAP_REG_UFC3, 258 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 259 CPCAP_REG_UIC1, 260 CPCAP_REG_UIC2, 261 CPCAP_REG_UIC3, 262 CPCAP_REG_USBOTG1, 263 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 264 CPCAP_REG_USBOTG2, 265 CPCAP_REG_USBOTG3, 266 CPCAP_REG_UIER1, 267 CPCAP_REG_UIER2, 268 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 269 CPCAP_REG_UIER3, 270 CPCAP_REG_UIEF1, 271 CPCAP_REG_UIEF2, 272 CPCAP_REG_UIEF3, 273 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 274 CPCAP_REG_UIS, 275 CPCAP_REG_UIL, 276 CPCAP_REG_USBD, 277 CPCAP_REG_SCR1, 278 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 279 CPCAP_REG_SCR2, 280 CPCAP_REG_SCR3, 281 CPCAP_REG_VMC, 282 CPCAP_REG_OWDC, 283 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 284 CPCAP_REG_GPIO0, 285 CPCAP_REG_GPIO1, 286 CPCAP_REG_GPIO2, 287 CPCAP_REG_GPIO3, 288 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 289 CPCAP_REG_GPIO4, 290 CPCAP_REG_GPIO5, 291 CPCAP_REG_GPIO6, 292 CPCAP_REG_MDLC, 293 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 294 CPCAP_REG_KLC, 295 CPCAP_REG_ADLC, 296 CPCAP_REG_REDC, 297 CPCAP_REG_GREENC, 298 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 299 CPCAP_REG_BLUEC, 300 CPCAP_REG_CFC, 301 CPCAP_REG_ABC, 302 CPCAP_REG_BLEDC, 303 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 304 CPCAP_REG_CLEDC, 305 CPCAP_REG_OW1C, 306 CPCAP_REG_OW1D, 307 CPCAP_REG_OW1I, 308 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 309 CPCAP_REG_OW1IE, 310 CPCAP_REG_OW1, 311 CPCAP_REG_OW2C, 312 CPCAP_REG_OW2D, 313 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 314 CPCAP_REG_OW2I, 315 CPCAP_REG_OW2IE, 316 CPCAP_REG_OW2, 317 CPCAP_REG_OW3C, 318 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 319 CPCAP_REG_OW3D, 320 CPCAP_REG_OW3I, 321 CPCAP_REG_OW3IE, 322 CPCAP_REG_OW3, 323 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 324 CPCAP_REG_GCAIC, 325 CPCAP_REG_GCAIM, 326 CPCAP_REG_LGDIR, 327 CPCAP_REG_LGPU, 328 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 329 CPCAP_REG_LGPIN, 330 CPCAP_REG_LGMASK, 331 CPCAP_REG_LDEB, 332 CPCAP_REG_LGDET, 333 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 334 CPCAP_REG_LMISC, 335 CPCAP_REG_LMACE, 336 CPCAP_REG_END = CPCAP_REG_LMACE, 337 CPCAP_REG_MAX 338 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 339 = CPCAP_REG_END, 340 CPCAP_REG_SIZE = CPCAP_REG_MAX + 1, 341 CPCAP_REG_UNUSED = CPCAP_REG_MAX + 2, 342 }; 343 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 344 enum { 345 CPCAP_IOCTL_NUM_TEST__START, 346 CPCAP_IOCTL_NUM_TEST_READ_REG, 347 CPCAP_IOCTL_NUM_TEST_WRITE_REG, 348 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 349 CPCAP_IOCTL_NUM_TEST__END, 350 CPCAP_IOCTL_NUM_ADC__START, 351 CPCAP_IOCTL_NUM_ADC_PHASE, 352 CPCAP_IOCTL_NUM_ADC__END, 353 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 354 CPCAP_IOCTL_NUM_BATT__START, 355 CPCAP_IOCTL_NUM_BATT_DISPLAY_UPDATE, 356 CPCAP_IOCTL_NUM_BATT_ATOD_ASYNC, 357 CPCAP_IOCTL_NUM_BATT_ATOD_SYNC, 358 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 359 CPCAP_IOCTL_NUM_BATT_ATOD_READ, 360 CPCAP_IOCTL_NUM_BATT__END, 361 CPCAP_IOCTL_NUM_UC__START, 362 CPCAP_IOCTL_NUM_UC_MACRO_START, 363 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 364 CPCAP_IOCTL_NUM_UC_MACRO_STOP, 365 CPCAP_IOCTL_NUM_UC_GET_VENDOR, 366 CPCAP_IOCTL_NUM_UC_SET_TURBO_MODE, 367 CPCAP_IOCTL_NUM_UC__END, 368 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 369 CPCAP_IOCTL_NUM_ACCY__START, 370 CPCAP_IOCTL_NUM_ACCY_WHISPER, 371 CPCAP_IOCTL_NUM_ACCY__END, 372 }; 373 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 374 enum cpcap_irqs { 375 CPCAP_IRQ__START, 376 CPCAP_IRQ_HSCLK = CPCAP_IRQ_INT1_INDEX, 377 CPCAP_IRQ_PRIMAC, 378 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 379 CPCAP_IRQ_SECMAC, 380 CPCAP_IRQ_LOWBPL, 381 CPCAP_IRQ_SEC2PRI, 382 CPCAP_IRQ_LOWBPH, 383 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 384 CPCAP_IRQ_EOL, 385 CPCAP_IRQ_TS, 386 CPCAP_IRQ_ADCDONE, 387 CPCAP_IRQ_HS, 388 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 389 CPCAP_IRQ_MB2, 390 CPCAP_IRQ_VBUSOV, 391 CPCAP_IRQ_RVRS_CHRG, 392 CPCAP_IRQ_CHRG_DET, 393 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 394 CPCAP_IRQ_IDFLOAT, 395 CPCAP_IRQ_IDGND, 396 CPCAP_IRQ_SE1 = CPCAP_IRQ_INT2_INDEX, 397 CPCAP_IRQ_SESSEND, 398 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 399 CPCAP_IRQ_SESSVLD, 400 CPCAP_IRQ_VBUSVLD, 401 CPCAP_IRQ_CHRG_CURR1, 402 CPCAP_IRQ_CHRG_CURR2, 403 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 404 CPCAP_IRQ_RVRS_MODE, 405 CPCAP_IRQ_ON, 406 CPCAP_IRQ_ON2, 407 CPCAP_IRQ_CLK, 408 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 409 CPCAP_IRQ_1HZ, 410 CPCAP_IRQ_PTT, 411 CPCAP_IRQ_SE0CONN, 412 CPCAP_IRQ_CHRG_SE1B, 413 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 414 CPCAP_IRQ_UART_ECHO_OVERRUN, 415 CPCAP_IRQ_EXTMEMHD, 416 CPCAP_IRQ_WARM = CPCAP_IRQ_INT3_INDEX, 417 CPCAP_IRQ_SYSRSTR, 418 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 419 CPCAP_IRQ_SOFTRST, 420 CPCAP_IRQ_DIEPWRDWN, 421 CPCAP_IRQ_DIETEMPH, 422 CPCAP_IRQ_PC, 423 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 424 CPCAP_IRQ_OFLOWSW, 425 CPCAP_IRQ_TODA, 426 CPCAP_IRQ_OPT_SEL_DTCH, 427 CPCAP_IRQ_OPT_SEL_STATE, 428 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 429 CPCAP_IRQ_ONEWIRE1, 430 CPCAP_IRQ_ONEWIRE2, 431 CPCAP_IRQ_ONEWIRE3, 432 CPCAP_IRQ_UCRESET, 433 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 434 CPCAP_IRQ_PWRGOOD, 435 CPCAP_IRQ_USBDPLLCLK, 436 CPCAP_IRQ_DPI = CPCAP_IRQ_INT4_INDEX, 437 CPCAP_IRQ_DMI, 438 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 439 CPCAP_IRQ_UCBUSY, 440 CPCAP_IRQ_GCAI_CURR1, 441 CPCAP_IRQ_GCAI_CURR2, 442 CPCAP_IRQ_SB_MAX_RETRANSMIT_ERR, 443 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 444 CPCAP_IRQ_BATTDETB, 445 CPCAP_IRQ_PRIHALT, 446 CPCAP_IRQ_SECHALT, 447 CPCAP_IRQ_CC_CAL, 448 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 449 CPCAP_IRQ_UC_PRIROMR = CPCAP_IRQ_INT5_INDEX, 450 CPCAP_IRQ_UC_PRIRAMW, 451 CPCAP_IRQ_UC_PRIRAMR, 452 CPCAP_IRQ_UC_USEROFF, 453 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 454 CPCAP_IRQ_UC_PRIMACRO_4, 455 CPCAP_IRQ_UC_PRIMACRO_5, 456 CPCAP_IRQ_UC_PRIMACRO_6, 457 CPCAP_IRQ_UC_PRIMACRO_7, 458 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 459 CPCAP_IRQ_UC_PRIMACRO_8, 460 CPCAP_IRQ_UC_PRIMACRO_9, 461 CPCAP_IRQ_UC_PRIMACRO_10, 462 CPCAP_IRQ_UC_PRIMACRO_11, 463 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 464 CPCAP_IRQ_UC_PRIMACRO_12, 465 CPCAP_IRQ_UC_PRIMACRO_13, 466 CPCAP_IRQ_UC_PRIMACRO_14, 467 CPCAP_IRQ_UC_PRIMACRO_15, 468 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 469 CPCAP_IRQ__NUM 470 }; 471 enum cpcap_adc_bank0 { 472 CPCAP_ADC_AD0_BATTDETB, 473 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 474 CPCAP_ADC_BATTP, 475 CPCAP_ADC_VBUS, 476 CPCAP_ADC_AD3, 477 CPCAP_ADC_BPLUS_AD4, 478 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 479 CPCAP_ADC_CHG_ISENSE, 480 CPCAP_ADC_BATTI_ADC, 481 CPCAP_ADC_USB_ID, 482 CPCAP_ADC_BANK0_NUM, 483 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 484 }; 485 enum cpcap_adc_bank1 { 486 CPCAP_ADC_AD8, 487 CPCAP_ADC_AD9, 488 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 489 CPCAP_ADC_LICELL, 490 CPCAP_ADC_HV_BATTP, 491 CPCAP_ADC_TSX1_AD12, 492 CPCAP_ADC_TSX2_AD13, 493 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 494 CPCAP_ADC_TSY1_AD14, 495 CPCAP_ADC_TSY2_AD15, 496 CPCAP_ADC_BANK1_NUM, 497 }; 498 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 499 enum cpcap_adc_format { 500 CPCAP_ADC_FORMAT_RAW, 501 CPCAP_ADC_FORMAT_PHASED, 502 CPCAP_ADC_FORMAT_CONVERTED, 503 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 504 }; 505 enum cpcap_adc_timing { 506 CPCAP_ADC_TIMING_IMM, 507 CPCAP_ADC_TIMING_IN, 508 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 509 CPCAP_ADC_TIMING_OUT, 510 }; 511 enum cpcap_adc_type { 512 CPCAP_ADC_TYPE_BANK_0, 513 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 514 CPCAP_ADC_TYPE_BANK_1, 515 CPCAP_ADC_TYPE_BATT_PI, 516 }; 517 enum cpcap_macro { 518 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 519 CPCAP_MACRO_ROMR, 520 CPCAP_MACRO_RAMW, 521 CPCAP_MACRO_RAMR, 522 CPCAP_MACRO_USEROFF, 523 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 524 CPCAP_MACRO_4, 525 CPCAP_MACRO_5, 526 CPCAP_MACRO_6, 527 CPCAP_MACRO_7, 528 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 529 CPCAP_MACRO_8, 530 CPCAP_MACRO_9, 531 CPCAP_MACRO_10, 532 CPCAP_MACRO_11, 533 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 534 CPCAP_MACRO_12, 535 CPCAP_MACRO_13, 536 CPCAP_MACRO_14, 537 CPCAP_MACRO_15, 538 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 539 CPCAP_MACRO__END, 540 }; 541 enum cpcap_vendor { 542 CPCAP_VENDOR_ST, 543 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 544 CPCAP_VENDOR_TI, 545 }; 546 enum cpcap_revision { 547 CPCAP_REVISION_1_0 = 0x08, 548 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 549 CPCAP_REVISION_1_1 = 0x09, 550 CPCAP_REVISION_2_0 = 0x10, 551 CPCAP_REVISION_2_1 = 0x11, 552 }; 553 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 554 enum cpcap_batt_usb_model { 555 CPCAP_BATT_USB_MODEL_NONE, 556 CPCAP_BATT_USB_MODEL_USB, 557 CPCAP_BATT_USB_MODEL_FACTORY, 558 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 559 }; 560 struct cpcap_spi_init_data { 561 enum cpcap_reg reg; 562 unsigned short data; 563 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 564 }; 565 struct cpcap_adc_ato { 566 unsigned short ato_in; 567 unsigned short atox_in; 568 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 569 unsigned short adc_ps_factor_in; 570 unsigned short atox_ps_factor_in; 571 unsigned short ato_out; 572 unsigned short atox_out; 573 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 574 unsigned short adc_ps_factor_out; 575 unsigned short atox_ps_factor_out; 576 }; 577 struct cpcap_batt_data { 578 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 579 int status; 580 int health; 581 int present; 582 int capacity; 583 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 584 int batt_volt; 585 int batt_temp; 586 }; 587 struct cpcap_batt_ac_data { 588 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 589 int online; 590 }; 591 struct cpcap_batt_usb_data { 592 int online; 593 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 594 int current_now; 595 enum cpcap_batt_usb_model model; 596 }; 597 struct cpcap_device; 598 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 599 struct cpcap_adc_us_request { 600 enum cpcap_adc_format format; 601 enum cpcap_adc_timing timing; 602 enum cpcap_adc_type type; 603 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 604 int status; 605 int result[CPCAP_ADC_BANK0_NUM]; 606 }; 607 struct cpcap_adc_phase { 608 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 609 signed char offset_batti; 610 unsigned char slope_batti; 611 signed char offset_chrgi; 612 unsigned char slope_chrgi; 613 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 614 signed char offset_battp; 615 unsigned char slope_battp; 616 signed char offset_bp; 617 unsigned char slope_bp; 618 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 619 signed char offset_battt; 620 unsigned char slope_battt; 621 signed char offset_chrgv; 622 unsigned char slope_chrgv; 623 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 624 }; 625 struct cpcap_regacc { 626 unsigned short reg; 627 unsigned short value; 628 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 629 unsigned short mask; 630 }; 631 struct cpcap_whisper_request { 632 unsigned int cmd; 633 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 634 char dock_id[CPCAP_WHISPER_ID_SIZE]; 635 char dock_prop[CPCAP_WHISPER_PROP_SIZE]; 636 }; 637 #define CPCAP_IOCTL_TEST_READ_REG _IOWR(0, CPCAP_IOCTL_NUM_TEST_READ_REG, struct cpcap_regacc*) 638 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 639 #define CPCAP_IOCTL_TEST_WRITE_REG _IOWR(0, CPCAP_IOCTL_NUM_TEST_WRITE_REG, struct cpcap_regacc*) 640 #define CPCAP_IOCTL_ADC_PHASE _IOWR(0, CPCAP_IOCTL_NUM_ADC_PHASE, struct cpcap_adc_phase*) 641 #define CPCAP_IOCTL_BATT_DISPLAY_UPDATE _IOW(0, CPCAP_IOCTL_NUM_BATT_DISPLAY_UPDATE, struct cpcap_batt_data*) 642 #define CPCAP_IOCTL_BATT_ATOD_ASYNC _IOW(0, CPCAP_IOCTL_NUM_BATT_ATOD_ASYNC, struct cpcap_adc_us_request*) 643 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 644 #define CPCAP_IOCTL_BATT_ATOD_SYNC _IOWR(0, CPCAP_IOCTL_NUM_BATT_ATOD_SYNC, struct cpcap_adc_us_request*) 645 #define CPCAP_IOCTL_BATT_ATOD_READ _IOWR(0, CPCAP_IOCTL_NUM_BATT_ATOD_READ, struct cpcap_adc_us_request*) 646 #define CPCAP_IOCTL_UC_MACRO_START _IOWR(0, CPCAP_IOCTL_NUM_UC_MACRO_START, enum cpcap_macro) 647 #define CPCAP_IOCTL_UC_MACRO_STOP _IOWR(0, CPCAP_IOCTL_NUM_UC_MACRO_STOP, enum cpcap_macro) 648 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 649 #define CPCAP_IOCTL_UC_GET_VENDOR _IOWR(0, CPCAP_IOCTL_NUM_UC_GET_VENDOR, enum cpcap_vendor) 650 #define CPCAP_IOCTL_UC_SET_TURBO_MODE _IOW(0, CPCAP_IOCTL_NUM_UC_SET_TURBO_MODE, unsigned short) 651 #define CPCAP_IOCTL_ACCY_WHISPER _IOW(0, CPCAP_IOCTL_NUM_ACCY_WHISPER, struct cpcap_whisper_request*) 652 #endif 653 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 654
