1 This file is a partial list of people who have contributed to the LLVM 2 project. If you have contributed a patch or made some other contribution to 3 LLVM, please submit a patch to this file to add yourself, and it will be 4 done! 5 6 The list is sorted by surname and formatted to allow easy grepping and 7 beautification by scripts. The fields are: name (N), email (E), web-address 8 (W), PGP key ID and fingerprint (P), description (D), and snail-mail address 9 (S). 10 11 12 N: Vikram Adve 13 E: vadve (a] cs.uiuc.edu 14 W: http://www.cs.uiuc.edu/~vadve/ 15 D: The Sparc64 backend, provider of much wisdom, and motivator for LLVM 16 17 N: Owen Anderson 18 E: resistor (a] mac.com 19 D: LCSSA pass and related LoopUnswitch work 20 D: GVNPRE pass, TargetData refactoring, random improvements 21 22 N: Henrik Bach 23 D: MingW Win32 API portability layer 24 25 N: Nate Begeman 26 E: natebegeman (a] mac.com 27 D: PowerPC backend developer 28 D: Target-independent code generator and analysis improvements 29 30 N: Daniel Berlin 31 E: dberlin (a] dberlin.org 32 D: ET-Forest implementation. 33 D: Sparse bitmap 34 35 N: David Blaikie 36 E: dblaikie (a] gmail.com 37 D: General bug fixing/fit & finish, mostly in Clang 38 39 N: Neil Booth 40 E: neil (a] daikokuya.co.uk 41 D: APFloat implementation. 42 43 N: Misha Brukman 44 E: brukman+llvm (a] uiuc.edu 45 W: http://misha.brukman.net 46 D: Portions of X86 and Sparc JIT compilers, PowerPC backend 47 D: Incremental bitcode loader 48 49 N: Cameron Buschardt 50 E: buschard (a] uiuc.edu 51 D: The `mem2reg' pass - promotes values stored in memory to registers 52 53 N: Brendon Cahoon 54 E: bcahoon (a] codeaurora.org 55 D: Loop unrolling with run-time trip counts. 56 57 N: Chandler Carruth 58 E: chandlerc (a] gmail.com 59 D: Hashing algorithms and interfaces 60 D: Inline cost analysis 61 D: Machine block placement pass 62 63 N: Casey Carter 64 E: ccarter (a] uiuc.edu 65 D: Fixes to the Reassociation pass, various improvement patches 66 67 N: Evan Cheng 68 E: evan.cheng (a] apple.com 69 D: ARM and X86 backends 70 D: Instruction scheduler improvements 71 D: Register allocator improvements 72 D: Loop optimizer improvements 73 D: Target-independent code generator improvements 74 75 N: Dan Villiom Podlaski Christiansen 76 E: danchr (a] gmail.com 77 E: danchr (a] cs.au.dk 78 W: http://villiom.dk 79 D: LLVM Makefile improvements 80 D: Clang diagnostic & driver tweaks 81 S: Aarhus, Denmark 82 83 N: Jeff Cohen 84 E: jeffc (a] jolt-lang.org 85 W: http://jolt-lang.org 86 D: Native Win32 API portability layer 87 88 N: John T. Criswell 89 E: criswell (a] uiuc.edu 90 D: Original Autoconf support, documentation improvements, bug fixes 91 92 N: Anshuman Dasgupta 93 E: adasgupt (a] codeaurora.org 94 D: Deterministic finite automaton based infrastructure for VLIW packetization 95 96 N: Stefanus Du Toit 97 E: stefanus.dutoit (a] rapidmind.com 98 D: Bug fixes and minor improvements 99 100 N: Rafael Avila de Espindola 101 E: rafael.espindola (a] gmail.com 102 D: The ARM backend 103 104 N: Alkis Evlogimenos 105 E: alkis (a] evlogimenos.com 106 D: Linear scan register allocator, many codegen improvements, Java frontend 107 108 N: Hal Finkel 109 E: hfinkel (a] anl.gov 110 D: Basic-block autovectorization, PowerPC backend improvements 111 112 N: Ryan Flynn 113 E: pizza (a] parseerror.com 114 D: Miscellaneous bug fixes 115 116 N: Brian Gaeke 117 E: gaeke (a] uiuc.edu 118 W: http://www.students.uiuc.edu/~gaeke/ 119 D: Portions of X86 static and JIT compilers; initial SparcV8 backend 120 D: Dynamic trace optimizer 121 D: FreeBSD/X86 compatibility fixes, the llvm-nm tool 122 123 N: Nicolas Geoffray 124 E: nicolas.geoffray (a] lip6.fr 125 W: http://www-src.lip6.fr/homepages/Nicolas.Geoffray/ 126 D: PPC backend fixes for Linux 127 128 N: Louis Gerbarg 129 D: Portions of the PowerPC backend 130 131 N: Saem Ghani 132 E: saemghani (a] gmail.com 133 D: Callgraph class cleanups 134 135 N: Mikhail Glushenkov 136 E: foldr (a] codedgers.com 137 D: Author of llvmc2 138 139 N: Dan Gohman 140 E: gohman (a] apple.com 141 D: Miscellaneous bug fixes 142 143 N: David Goodwin 144 E: david (a] goodwinz.net 145 D: Thumb-2 code generator 146 147 N: David Greene 148 E: greened (a] obbligato.org 149 D: Miscellaneous bug fixes 150 D: Register allocation refactoring 151 152 N: Gabor Greif 153 E: ggreif (a] gmail.com 154 D: Improvements for space efficiency 155 156 N: James Grosbach 157 E: grosbach (a] apple.com 158 D: SjLj exception handling support 159 D: General fixes and improvements for the ARM back-end 160 D: MCJIT 161 D: ARM integrated assembler and assembly parser 162 163 N: Lang Hames 164 E: lhames (a] gmail.com 165 D: PBQP-based register allocator 166 167 N: Gordon Henriksen 168 E: gordonhenriksen (a] mac.com 169 D: Pluggable GC support 170 D: C interface 171 D: Ocaml bindings 172 173 N: Raul Fernandes Herbster 174 E: raul (a] dsc.ufcg.edu.br 175 D: JIT support for ARM 176 177 N: Paolo Invernizzi 178 E: arathorn (a] fastwebnet.it 179 D: Visual C++ compatibility fixes 180 181 N: Patrick Jenkins 182 E: patjenk (a] wam.umd.edu 183 D: Nightly Tester 184 185 N: Dale Johannesen 186 E: dalej (a] apple.com 187 D: ARM constant islands improvements 188 D: Tail merging improvements 189 D: Rewrite X87 back end 190 D: Use APFloat for floating point constants widely throughout compiler 191 D: Implement X87 long double 192 193 N: Brad Jones 194 E: kungfoomaster (a] nondot.org 195 D: Support for packed types 196 197 N: Rod Kay 198 E: rkay (a] auroraux.org 199 D: Author of LLVM Ada bindings 200 201 N: Eric Kidd 202 W: http://randomhacks.net/ 203 D: llvm-config script 204 205 N: Anton Korobeynikov 206 E: asl (a] math.spbu.ru 207 D: Mingw32 fixes, cross-compiling support, stdcall/fastcall calling conv. 208 D: x86/linux PIC codegen, aliases, regparm/visibility attributes 209 D: Switch lowering refactoring 210 211 N: Sumant Kowshik 212 E: kowshik (a] uiuc.edu 213 D: Author of the original C backend 214 215 N: Benjamin Kramer 216 E: benny.kra (a] gmail.com 217 D: Miscellaneous bug fixes 218 219 N: Sundeep Kushwaha 220 E: sundeepk (a] codeaurora.org 221 D: Implemented DFA-based target independent VLIW packetizer 222 223 N: Christopher Lamb 224 E: christopher.lamb (a] gmail.com 225 D: aligned load/store support, parts of noalias and restrict support 226 D: vreg subreg infrastructure, X86 codegen improvements based on subregs 227 D: address spaces 228 229 N: Jim Laskey 230 E: jlaskey (a] apple.com 231 D: Improvements to the PPC backend, instruction scheduling 232 D: Debug and Dwarf implementation 233 D: Auto upgrade mangler 234 D: llvm-gcc4 svn wrangler 235 236 N: Chris Lattner 237 E: sabre (a] nondot.org 238 W: http://nondot.org/~sabre/ 239 D: Primary architect of LLVM 240 241 N: Tanya Lattner (Tanya Brethour) 242 E: tonic (a] nondot.org 243 W: http://nondot.org/~tonic/ 244 D: The initial llvm-ar tool, converted regression testsuite to dejagnu 245 D: Modulo scheduling in the SparcV9 backend 246 D: Release manager (1.7+) 247 248 N: Andrew Lenharth 249 E: alenhar2 (a] cs.uiuc.edu 250 W: http://www.lenharth.org/~andrewl/ 251 D: Alpha backend 252 D: Sampling based profiling 253 254 N: Nick Lewycky 255 E: nicholas (a] mxc.ca 256 D: PredicateSimplifier pass 257 258 N: Tony Linthicum, et. al. 259 E: tlinth (a] codeaurora.org 260 D: Backend for Qualcomm's Hexagon VLIW processor. 261 262 N: Bruno Cardoso Lopes 263 E: bruno.cardoso (a] gmail.com 264 W: http://www.brunocardoso.org 265 D: The Mips backend 266 267 N: Duraid Madina 268 E: duraid (a] octopus.com.au 269 W: http://kinoko.c.u-tokyo.ac.jp/~duraid/ 270 D: IA64 backend, BigBlock register allocator 271 272 N: John McCall 273 E: rjmccall (a] apple.com 274 D: Clang semantic analysis and IR generation 275 276 N: Michael McCracken 277 E: michael.mccracken (a] gmail.com 278 D: Line number support for llvmgcc 279 280 N: Vladimir Merzliakov 281 E: wanderer (a] rsu.ru 282 D: Test suite fixes for FreeBSD 283 284 N: Scott Michel 285 E: scottm (a] aero.org 286 D: Added STI Cell SPU backend. 287 288 N: Kai Nacke 289 E: kai (a] redstar.de 290 D: Support for implicit TLS model used with MS VC runtime 291 292 N: Takumi Nakamura 293 E: geek4civic (a] gmail.com 294 E: chapuni (a] hf.rim.or.jp 295 D: Cygwin and MinGW support. 296 D: Win32 tweaks. 297 S: Yokohama, Japan 298 299 N: Edward O'Callaghan 300 E: eocallaghan (a] auroraux.org 301 W: http://www.auroraux.org 302 D: Add Clang support with various other improvements to utils/NewNightlyTest.pl 303 D: Fix and maintain Solaris & AuroraUX support for llvm, various build warnings 304 D: and error clean ups. 305 306 N: Morten Ofstad 307 E: morten (a] hue.no 308 D: Visual C++ compatibility fixes 309 310 N: Jakob Stoklund Olesen 311 E: stoklund (a] 2pi.dk 312 D: Machine code verifier 313 D: Blackfin backend 314 D: Fast register allocator 315 D: Greedy register allocator 316 317 N: Richard Osborne 318 E: richard (a] xmos.com 319 D: XCore backend 320 321 N: Devang Patel 322 E: dpatel (a] apple.com 323 D: LTO tool, PassManager rewrite, Loop Pass Manager, Loop Rotate 324 D: GCC PCH Integration (llvm-gcc), llvm-gcc improvements 325 D: Optimizer improvements, Loop Index Split 326 327 N: Sandeep Patel 328 E: deeppatel1987 (a] gmail.com 329 D: ARM calling conventions rewrite, hard float support 330 331 N: Wesley Peck 332 E: peckw (a] wesleypeck.com 333 W: http://wesleypeck.com/ 334 D: MicroBlaze backend 335 336 N: Francois Pichet 337 E: pichet2000 (a] gmail.com 338 D: MSVC support 339 340 N: Vladimir Prus 341 W: http://vladimir_prus.blogspot.com 342 E: ghost (a] cs.msu.su 343 D: Made inst_iterator behave like a proper iterator, LowerConstantExprs pass 344 345 N: Xerxes Ranby 346 E: xerxes (a] zafena.se 347 D: Cmake dependency chain and various bug fixes 348 349 N: Chad Rosier 350 E: mcrosier (a] apple.com 351 D: ARM fast-isel improvements 352 D: Performance monitoring 353 354 N: Nadav Rotem 355 E: nadav.rotem (a] intel.com 356 D: Vector code generation improvements. 357 358 N: Roman Samoilov 359 E: roman (a] codedgers.com 360 D: MSIL backend 361 362 N: Duncan Sands 363 E: baldrick (a] free.fr 364 D: Ada support in llvm-gcc 365 D: Dragonegg plugin 366 D: Exception handling improvements 367 D: Type legalizer rewrite 368 369 N: Ruchira Sasanka 370 E: sasanka (a] uiuc.edu 371 D: Graph coloring register allocator for the Sparc64 backend 372 373 N: Arnold Schwaighofer 374 E: arnold.schwaighofer (a] gmail.com 375 D: Tail call optimization for the x86 backend 376 377 N: Shantonu Sen 378 E: ssen (a] apple.com 379 D: Miscellaneous bug fixes 380 381 N: Anand Shukla 382 E: ashukla (a] cs.uiuc.edu 383 D: The `paths' pass 384 385 N: Michael J. Spencer 386 E: bigcheesegs (a] gmail.com 387 D: Shepherding Windows COFF support into MC. 388 D: Lots of Windows stuff. 389 390 N: Reid Spencer 391 E: rspencer (a] reidspencer.com 392 W: http://reidspencer.com/ 393 D: Lots of stuff, see: http://wiki.llvm.org/index.php/User:Reid 394 395 N: Edwin Torok 396 E: edwintorok (a] gmail.com 397 D: Miscellaneous bug fixes 398 399 N: Adam Treat 400 E: manyoso (a] yahoo.com 401 D: C++ bugs filed, and C++ front-end bug fixes. 402 403 N: Lauro Ramos Venancio 404 E: lauro.venancio (a] indt.org.br 405 D: ARM backend improvements 406 D: Thread Local Storage implementation 407 408 N: Bill Wendling 409 E: wendling (a] apple.com 410 D: Exception handling 411 D: Bunches of stuff 412 413 N: Bob Wilson 414 E: bob.wilson (a] acm.org 415 D: Advanced SIMD (NEON) support in the ARM backend 416
