1 //=- HexagonInstrInfoV3.td - Target Desc. for Hexagon Target -*- tablegen -*-=// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file describes the Hexagon V3 instructions in TableGen format. 11 // 12 //===----------------------------------------------------------------------===// 13 14 15 //===----------------------------------------------------------------------===// 16 // J + 17 //===----------------------------------------------------------------------===// 18 // Call subroutine. 19 let isCall = 1, neverHasSideEffects = 1, 20 Defs = [D0, D1, D2, D3, D4, D5, D6, D7, R28, R31, 21 P0, P1, P2, P3, LC0, LC1, SA0, SA1] in { 22 def CALLv3 : JInst<(outs), (ins calltarget:$dst, variable_ops), 23 "call $dst", []>, Requires<[HasV3T]>; 24 } 25 26 //===----------------------------------------------------------------------===// 27 // J - 28 //===----------------------------------------------------------------------===// 29 30 31 //===----------------------------------------------------------------------===// 32 // JR + 33 //===----------------------------------------------------------------------===// 34 // Call subroutine from register. 35 let isCall = 1, neverHasSideEffects = 1, 36 Defs = [D0, D1, D2, D3, D4, D5, D6, D7, R28, R31, 37 P0, P1, P2, P3, LC0, LC1, SA0, SA1] in { 38 def CALLRv3 : JRInst<(outs), (ins IntRegs:$dst, variable_ops), 39 "callr $dst", 40 []>, Requires<[HasV3TOnly]>; 41 } 42 43 44 // if(p?.new) jumpr:t r? 45 let isReturn = 1, isTerminator = 1, isBarrier = 1, 46 Defs = [PC], Uses = [R31] in { 47 def JMPR_cPnewt: JRInst<(outs), (ins PredRegs:$src1, IntRegs:$src2), 48 "if ($src1.new) jumpr:t $src2", 49 []>, Requires<[HasV3T]>; 50 } 51 52 // if (!p?.new) jumpr:t r? 53 let isReturn = 1, isTerminator = 1, isBarrier = 1, 54 Defs = [PC], Uses = [R31] in { 55 def JMPR_cNotPnewt: JRInst<(outs), (ins PredRegs:$src1, IntRegs:$src2), 56 "if (!$src1.new) jumpr:t $src2", 57 []>, Requires<[HasV3T]>; 58 } 59 60 // Not taken. 61 // if(p?.new) jumpr:nt r? 62 let isReturn = 1, isTerminator = 1, isBarrier = 1, 63 Defs = [PC], Uses = [R31] in { 64 def JMPR_cPnewNt: JRInst<(outs), (ins PredRegs:$src1, IntRegs:$src2), 65 "if ($src1.new) jumpr:nt $src2", 66 []>, Requires<[HasV3T]>; 67 } 68 69 // if (!p?.new) jumpr:nt r? 70 let isReturn = 1, isTerminator = 1, isBarrier = 1, 71 Defs = [PC], Uses = [R31] in { 72 def JMPR_cNotPnewNt: JRInst<(outs), (ins PredRegs:$src1, IntRegs:$src2), 73 "if (!$src1.new) jumpr:nt $src2", 74 []>, Requires<[HasV3T]>; 75 } 76 77 //===----------------------------------------------------------------------===// 78 // JR - 79 //===----------------------------------------------------------------------===// 80 81 //===----------------------------------------------------------------------===// 82 // ALU64/ALU + 83 //===----------------------------------------------------------------------===// 84 85 let AddedComplexity = 200 in 86 def MAXw_dd : ALU64_rr<(outs DoubleRegs:$dst), (ins DoubleRegs:$src1, 87 DoubleRegs:$src2), 88 "$dst = max($src2, $src1)", 89 [(set DoubleRegs:$dst, (select (i1 (setlt DoubleRegs:$src2, 90 DoubleRegs:$src1)), 91 DoubleRegs:$src1, 92 DoubleRegs:$src2))]>, 93 Requires<[HasV3T]>; 94 95 let AddedComplexity = 200 in 96 def MINw_dd : ALU64_rr<(outs DoubleRegs:$dst), (ins DoubleRegs:$src1, 97 DoubleRegs:$src2), 98 "$dst = min($src2, $src1)", 99 [(set DoubleRegs:$dst, (select (i1 (setgt DoubleRegs:$src2, 100 DoubleRegs:$src1)), 101 DoubleRegs:$src1, 102 DoubleRegs:$src2))]>, 103 Requires<[HasV3T]>; 104 105 //===----------------------------------------------------------------------===// 106 // ALU64/ALU - 107 //===----------------------------------------------------------------------===// 108 109 110 111 112 //def : Pat <(brcond (i1 (seteq IntRegs:$src1, 0)), bb:$offset), 113 // (JMP_RegEzt IntRegs:$src1, bb:$offset)>, Requires<[HasV3T]>; 114 115 //def : Pat <(brcond (i1 (setne IntRegs:$src1, 0)), bb:$offset), 116 // (JMP_RegNzt IntRegs:$src1, bb:$offset)>, Requires<[HasV3T]>; 117 118 //def : Pat <(brcond (i1 (setle IntRegs:$src1, 0)), bb:$offset), 119 // (JMP_RegLezt IntRegs:$src1, bb:$offset)>, Requires<[HasV3T]>; 120 121 //def : Pat <(brcond (i1 (setge IntRegs:$src1, 0)), bb:$offset), 122 // (JMP_RegGezt IntRegs:$src1, bb:$offset)>, Requires<[HasV3T]>; 123 124 //def : Pat <(brcond (i1 (setgt IntRegs:$src1, -1)), bb:$offset), 125 // (JMP_RegGezt IntRegs:$src1, bb:$offset)>, Requires<[HasV3T]>; 126 127 128 // Map call instruction 129 def : Pat<(call IntRegs:$dst), 130 (CALLRv3 IntRegs:$dst)>, Requires<[HasV3T]>; 131 def : Pat<(call tglobaladdr:$dst), 132 (CALLv3 tglobaladdr:$dst)>, Requires<[HasV3T]>; 133 def : Pat<(call texternalsym:$dst), 134 (CALLv3 texternalsym:$dst)>, Requires<[HasV3T]>; 135
