1 //===-- MipsCallingConv.td - Calling Conventions for Mips --*- tablegen -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // This describes the calling conventions for Mips architecture. 10 //===----------------------------------------------------------------------===// 11 12 /// CCIfSubtarget - Match if the current subtarget has a feature F. 13 class CCIfSubtarget<string F, CCAction A>: 14 CCIf<!strconcat("State.getTarget().getSubtarget<MipsSubtarget>().", F), A>; 15 16 //===----------------------------------------------------------------------===// 17 // Mips O32 Calling Convention 18 //===----------------------------------------------------------------------===// 19 20 // Only the return rules are defined here for O32. The rules for argument 21 // passing are defined in MipsISelLowering.cpp. 22 def RetCC_MipsO32 : CallingConv<[ 23 // i32 are returned in registers V0, V1, A0, A1 24 CCIfType<[i32], CCAssignToReg<[V0, V1, A0, A1]>>, 25 26 // f32 are returned in registers F0, F2 27 CCIfType<[f32], CCAssignToReg<[F0, F2]>>, 28 29 // f64 are returned in register D0, D1 30 CCIfType<[f64], CCIfSubtarget<"isNotSingleFloat()", CCAssignToReg<[D0, D1]>>> 31 ]>; 32 33 //===----------------------------------------------------------------------===// 34 // Mips N32/64 Calling Convention 35 //===----------------------------------------------------------------------===// 36 37 def CC_MipsN : CallingConv<[ 38 // Handles byval parameters. 39 CCIfByVal<CCCustom<"CC_Mips64Byval">>, 40 41 // Promote i8/i16 arguments to i32. 42 CCIfType<[i8, i16], CCPromoteToType<i32>>, 43 44 // Integer arguments are passed in integer registers. 45 CCIfType<[i32], CCAssignToRegWithShadow<[A0, A1, A2, A3, 46 T0, T1, T2, T3], 47 [F12, F13, F14, F15, 48 F16, F17, F18, F19]>>, 49 50 CCIfType<[i64], CCAssignToRegWithShadow<[A0_64, A1_64, A2_64, A3_64, 51 T0_64, T1_64, T2_64, T3_64], 52 [D12_64, D13_64, D14_64, D15_64, 53 D16_64, D17_64, D18_64, D19_64]>>, 54 55 // f32 arguments are passed in single precision FP registers. 56 CCIfType<[f32], CCAssignToRegWithShadow<[F12, F13, F14, F15, 57 F16, F17, F18, F19], 58 [A0_64, A1_64, A2_64, A3_64, 59 T0_64, T1_64, T2_64, T3_64]>>, 60 61 // f64 arguments are passed in double precision FP registers. 62 CCIfType<[f64], CCAssignToRegWithShadow<[D12_64, D13_64, D14_64, D15_64, 63 D16_64, D17_64, D18_64, D19_64], 64 [A0_64, A1_64, A2_64, A3_64, 65 T0_64, T1_64, T2_64, T3_64]>>, 66 67 // All stack parameter slots become 64-bit doublewords and are 8-byte aligned. 68 CCIfType<[i32, f32], CCAssignToStack<4, 8>>, 69 CCIfType<[i64, f64], CCAssignToStack<8, 8>> 70 ]>; 71 72 // N32/64 variable arguments. 73 // All arguments are passed in integer registers. 74 def CC_MipsN_VarArg : CallingConv<[ 75 // Handles byval parameters. 76 CCIfByVal<CCCustom<"CC_Mips64Byval">>, 77 78 // Promote i8/i16 arguments to i32. 79 CCIfType<[i8, i16], CCPromoteToType<i32>>, 80 81 CCIfType<[i32, f32], CCAssignToReg<[A0, A1, A2, A3, T0, T1, T2, T3]>>, 82 83 CCIfType<[i64, f64], CCAssignToReg<[A0_64, A1_64, A2_64, A3_64, 84 T0_64, T1_64, T2_64, T3_64]>>, 85 86 // All stack parameter slots become 64-bit doublewords and are 8-byte aligned. 87 CCIfType<[i32, f32], CCAssignToStack<4, 8>>, 88 CCIfType<[i64, f64], CCAssignToStack<8, 8>> 89 ]>; 90 91 def RetCC_MipsN : CallingConv<[ 92 // i32 are returned in registers V0, V1 93 CCIfType<[i32], CCAssignToReg<[V0, V1]>>, 94 95 // i64 are returned in registers V0_64, V1_64 96 CCIfType<[i64], CCAssignToReg<[V0_64, V1_64]>>, 97 98 // f32 are returned in registers F0, F2 99 CCIfType<[f32], CCAssignToReg<[F0, F2]>>, 100 101 // f64 are returned in registers D0, D2 102 CCIfType<[f64], CCAssignToReg<[D0_64, D2_64]>> 103 ]>; 104 105 //===----------------------------------------------------------------------===// 106 // Mips EABI Calling Convention 107 //===----------------------------------------------------------------------===// 108 109 def CC_MipsEABI : CallingConv<[ 110 // Promote i8/i16 arguments to i32. 111 CCIfType<[i8, i16], CCPromoteToType<i32>>, 112 113 // Integer arguments are passed in integer registers. 114 CCIfType<[i32], CCAssignToReg<[A0, A1, A2, A3, T0, T1, T2, T3]>>, 115 116 // Single fp arguments are passed in pairs within 32-bit mode 117 CCIfType<[f32], CCIfSubtarget<"isSingleFloat()", 118 CCAssignToReg<[F12, F13, F14, F15, F16, F17, F18, F19]>>>, 119 120 CCIfType<[f32], CCIfSubtarget<"isNotSingleFloat()", 121 CCAssignToReg<[F12, F14, F16, F18]>>>, 122 123 // The first 4 double fp arguments are passed in single fp registers. 124 CCIfType<[f64], CCIfSubtarget<"isNotSingleFloat()", 125 CCAssignToReg<[D6, D7, D8, D9]>>>, 126 127 // Integer values get stored in stack slots that are 4 bytes in 128 // size and 4-byte aligned. 129 CCIfType<[i32, f32], CCAssignToStack<4, 4>>, 130 131 // Integer values get stored in stack slots that are 8 bytes in 132 // size and 8-byte aligned. 133 CCIfType<[f64], CCIfSubtarget<"isNotSingleFloat()", CCAssignToStack<8, 8>>> 134 ]>; 135 136 def RetCC_MipsEABI : CallingConv<[ 137 // i32 are returned in registers V0, V1 138 CCIfType<[i32], CCAssignToReg<[V0, V1]>>, 139 140 // f32 are returned in registers F0, F1 141 CCIfType<[f32], CCAssignToReg<[F0, F1]>>, 142 143 // f64 are returned in register D0 144 CCIfType<[f64], CCIfSubtarget<"isNotSingleFloat()", CCAssignToReg<[D0]>>> 145 ]>; 146 147 //===----------------------------------------------------------------------===// 148 // Mips Calling Convention Dispatch 149 //===----------------------------------------------------------------------===// 150 151 def CC_Mips : CallingConv<[ 152 CCIfSubtarget<"isABI_EABI()", CCDelegateTo<CC_MipsEABI>>, 153 CCIfSubtarget<"isABI_N32()", CCDelegateTo<CC_MipsN>>, 154 CCIfSubtarget<"isABI_N64()", CCDelegateTo<CC_MipsN>> 155 ]>; 156 157 def RetCC_Mips : CallingConv<[ 158 CCIfSubtarget<"isABI_EABI()", CCDelegateTo<RetCC_MipsEABI>>, 159 CCIfSubtarget<"isABI_N32()", CCDelegateTo<RetCC_MipsN>>, 160 CCIfSubtarget<"isABI_N64()", CCDelegateTo<RetCC_MipsN>>, 161 CCDelegateTo<RetCC_MipsO32> 162 ]>; 163 164 //===----------------------------------------------------------------------===// 165 // Callee-saved register lists. 166 //===----------------------------------------------------------------------===// 167 168 def CSR_SingleFloatOnly : CalleeSavedRegs<(add (sequence "F%u", 31, 20), RA, FP, 169 (sequence "S%u", 7, 0))>; 170 171 def CSR_O32 : CalleeSavedRegs<(add (sequence "D%u", 15, 10), RA, FP, 172 (sequence "S%u", 7, 0))>; 173 174 def CSR_N32 : CalleeSavedRegs<(add D31_64, D29_64, D27_64, D25_64, D24_64, 175 D23_64, D22_64, D21_64, RA_64, FP_64, GP_64, 176 (sequence "S%u_64", 7, 0))>; 177 178 def CSR_N64 : CalleeSavedRegs<(add (sequence "D%u_64", 31, 24), RA_64, FP_64, 179 GP_64, (sequence "S%u_64", 7, 0))>; 180
