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      1 //===-- PTXTargetMachine.h - Define TargetMachine for PTX -------*- C++ -*-===//
      2 //
      3 //                     The LLVM Compiler Infrastructure
      4 //
      5 // This file is distributed under the University of Illinois Open Source
      6 // License. See LICENSE.TXT for details.
      7 //
      8 //===----------------------------------------------------------------------===//
      9 //
     10 // This file declares the PTX specific subclass of TargetMachine.
     11 //
     12 //===----------------------------------------------------------------------===//
     13 
     14 #ifndef PTX_TARGET_MACHINE_H
     15 #define PTX_TARGET_MACHINE_H
     16 
     17 #include "PTXISelLowering.h"
     18 #include "PTXInstrInfo.h"
     19 #include "PTXFrameLowering.h"
     20 #include "PTXSelectionDAGInfo.h"
     21 #include "PTXSubtarget.h"
     22 #include "llvm/Target/TargetData.h"
     23 #include "llvm/Target/TargetFrameLowering.h"
     24 #include "llvm/Target/TargetMachine.h"
     25 
     26 namespace llvm {
     27 class PTXTargetMachine : public LLVMTargetMachine {
     28   private:
     29     const TargetData    DataLayout;
     30     PTXSubtarget        Subtarget; // has to be initialized before FrameLowering
     31     PTXFrameLowering    FrameLowering;
     32     PTXInstrInfo        InstrInfo;
     33     PTXSelectionDAGInfo TSInfo;
     34     PTXTargetLowering   TLInfo;
     35 
     36   public:
     37     PTXTargetMachine(const Target &T, StringRef TT,
     38                      StringRef CPU, StringRef FS, const TargetOptions &Options,
     39                      Reloc::Model RM, CodeModel::Model CM,
     40                      CodeGenOpt::Level OL,
     41                      bool is64Bit);
     42 
     43     virtual const TargetData *getTargetData() const { return &DataLayout; }
     44 
     45     virtual const TargetFrameLowering *getFrameLowering() const {
     46       return &FrameLowering;
     47     }
     48 
     49     virtual const PTXInstrInfo *getInstrInfo() const { return &InstrInfo; }
     50     virtual const TargetRegisterInfo *getRegisterInfo() const {
     51       return &InstrInfo.getRegisterInfo(); }
     52 
     53     virtual const PTXTargetLowering *getTargetLowering() const {
     54       return &TLInfo; }
     55 
     56     virtual const PTXSelectionDAGInfo* getSelectionDAGInfo() const {
     57       return &TSInfo;
     58     }
     59 
     60     virtual const PTXSubtarget *getSubtargetImpl() const { return &Subtarget; }
     61 
     62     // Emission of machine code through JITCodeEmitter is not supported.
     63     virtual bool addPassesToEmitMachineCode(PassManagerBase &,
     64                                             JITCodeEmitter &,
     65                                             bool = true) {
     66       return true;
     67     }
     68 
     69     // Emission of machine code through MCJIT is not supported.
     70     virtual bool addPassesToEmitMC(PassManagerBase &,
     71                                    MCContext *&,
     72                                    raw_ostream &,
     73                                    bool = true) {
     74       return true;
     75     }
     76 
     77     // Pass Pipeline Configuration
     78     virtual TargetPassConfig *createPassConfig(PassManagerBase &PM);
     79 }; // class PTXTargetMachine
     80 
     81 
     82 class PTX32TargetMachine : public PTXTargetMachine {
     83   virtual void anchor();
     84 public:
     85 
     86   PTX32TargetMachine(const Target &T, StringRef TT,
     87                      StringRef CPU, StringRef FS, const TargetOptions &Options,
     88                      Reloc::Model RM, CodeModel::Model CM,
     89                      CodeGenOpt::Level OL);
     90 }; // class PTX32TargetMachine
     91 
     92 class PTX64TargetMachine : public PTXTargetMachine {
     93   virtual void anchor();
     94 public:
     95 
     96   PTX64TargetMachine(const Target &T, StringRef TT,
     97                      StringRef CPU, StringRef FS, const TargetOptions &Options,
     98                      Reloc::Model RM, CodeModel::Model CM,
     99                      CodeGenOpt::Level OL);
    100 }; // class PTX32TargetMachine
    101 
    102 } // namespace llvm
    103 
    104 #endif // PTX_TARGET_MACHINE_H
    105