1 ; RUN: llc < %s -mtriple=armv6-apple-ios -mattr=+vfp2 -arm-tail-calls | FileCheck %s -check-prefix=CHECKV6 2 ; RUN: llc < %s -mtriple=armv6-linux-gnueabi -relocation-model=pic -mattr=+vfp2 -arm-tail-calls | FileCheck %s -check-prefix=CHECKELF 3 ; RUN: llc < %s -mtriple=thumbv7-apple-ios -arm-tail-calls | FileCheck %s -check-prefix=CHECKT2D 4 ; RUN: llc < %s -mtriple=thumbv7-apple-ios5.0 | FileCheck %s -check-prefix=CHECKT2D 5 6 ; Enable tailcall optimization for iOS 5.0 7 ; rdar://9120031 8 9 @t = weak global i32 ()* null ; <i32 ()**> [#uses=1] 10 11 declare void @g(i32, i32, i32, i32) 12 13 define void @t1() { 14 ; CHECKELF: t1: 15 ; CHECKELF: bl g(PLT) 16 call void @g( i32 1, i32 2, i32 3, i32 4 ) 17 ret void 18 } 19 20 define void @t2() { 21 ; CHECKV6: t2: 22 ; CHECKV6: bx r0 23 ; CHECKT2D: t2: 24 ; CHECKT2D: ldr 25 ; CHECKT2D-NEXT: ldr 26 ; CHECKT2D-NEXT: bx r0 27 %tmp = load i32 ()** @t ; <i32 ()*> [#uses=1] 28 %tmp.upgrd.2 = tail call i32 %tmp( ) ; <i32> [#uses=0] 29 ret void 30 } 31 32 define void @t3() { 33 ; CHECKV6: t3: 34 ; CHECKV6: b _t2 35 ; CHECKELF: t3: 36 ; CHECKELF: b t2(PLT) 37 ; CHECKT2D: t3: 38 ; CHECKT2D: b.w _t2 39 40 tail call void @t2( ) ; <i32> [#uses=0] 41 ret void 42 } 43 44 ; Sibcall optimization of expanded libcalls. rdar://8707777 45 define double @t4(double %a) nounwind readonly ssp { 46 entry: 47 ; CHECKV6: t4: 48 ; CHECKV6: b _sin 49 ; CHECKELF: t4: 50 ; CHECKELF: b sin(PLT) 51 %0 = tail call double @sin(double %a) nounwind readonly ; <double> [#uses=1] 52 ret double %0 53 } 54 55 define float @t5(float %a) nounwind readonly ssp { 56 entry: 57 ; CHECKV6: t5: 58 ; CHECKV6: b _sinf 59 ; CHECKELF: t5: 60 ; CHECKELF: b sinf(PLT) 61 %0 = tail call float @sinf(float %a) nounwind readonly ; <float> [#uses=1] 62 ret float %0 63 } 64 65 declare float @sinf(float) nounwind readonly 66 67 declare double @sin(double) nounwind readonly 68 69 define i32 @t6(i32 %a, i32 %b) nounwind readnone { 70 entry: 71 ; CHECKV6: t6: 72 ; CHECKV6: b ___divsi3 73 ; CHECKELF: t6: 74 ; CHECKELF: b __aeabi_idiv(PLT) 75 %0 = sdiv i32 %a, %b 76 ret i32 %0 77 } 78 79 ; Make sure the tail call instruction isn't deleted 80 ; rdar://8309338 81 declare void @foo() nounwind 82 83 define void @t7() nounwind { 84 entry: 85 ; CHECKT2D: t7: 86 ; CHECKT2D: blxeq _foo 87 ; CHECKT2D-NEXT: pop.w 88 ; CHECKT2D-NEXT: b.w _foo 89 br i1 undef, label %bb, label %bb1.lr.ph 90 91 bb1.lr.ph: 92 tail call void @foo() nounwind 93 unreachable 94 95 bb: 96 tail call void @foo() nounwind 97 ret void 98 } 99 100 ; Make sure codegenprep is duplicating ret instructions to enable tail calls. 101 ; rdar://11140249 102 define i32 @t8(i32 %x) nounwind ssp { 103 entry: 104 ; CHECKT2D: t8: 105 ; CHECKT2D-NOT: push 106 ; CHECKT2D-NOT 107 %and = and i32 %x, 1 108 %tobool = icmp eq i32 %and, 0 109 br i1 %tobool, label %if.end, label %if.then 110 111 if.then: ; preds = %entry 112 ; CHECKT2D: bne.w _a 113 %call = tail call i32 @a(i32 %x) nounwind 114 br label %return 115 116 if.end: ; preds = %entry 117 %and1 = and i32 %x, 2 118 %tobool2 = icmp eq i32 %and1, 0 119 br i1 %tobool2, label %if.end5, label %if.then3 120 121 if.then3: ; preds = %if.end 122 ; CHECKT2D: bne.w _b 123 %call4 = tail call i32 @b(i32 %x) nounwind 124 br label %return 125 126 if.end5: ; preds = %if.end 127 ; CHECKT2D: b.w _c 128 %call6 = tail call i32 @c(i32 %x) nounwind 129 br label %return 130 131 return: ; preds = %if.end5, %if.then3, %if.then 132 %retval.0 = phi i32 [ %call, %if.then ], [ %call4, %if.then3 ], [ %call6, %if.end5 ] 133 ret i32 %retval.0 134 } 135 136 declare i32 @a(i32) 137 138 declare i32 @b(i32) 139 140 declare i32 @c(i32) 141 142 ; PR12419 143 ; rdar://11195178 144 ; Use the correct input chain for the tailcall node or else the call to 145 ; _ZN9MutexLockD1Ev would be lost. 146 %class.MutexLock = type { i8 } 147 148 @x = external global i32, align 4 149 150 define i32 @t9() nounwind { 151 ; CHECKT2D: t9: 152 ; CHECKT2D: blx __ZN9MutexLockC1Ev 153 ; CHECKT2D: blx __ZN9MutexLockD1Ev 154 ; CHECKT2D: b.w ___divsi3 155 %lock = alloca %class.MutexLock, align 1 156 %1 = call %class.MutexLock* @_ZN9MutexLockC1Ev(%class.MutexLock* %lock) 157 %2 = load i32* @x, align 4 158 %3 = sdiv i32 1000, %2 159 %4 = call %class.MutexLock* @_ZN9MutexLockD1Ev(%class.MutexLock* %lock) 160 ret i32 %3 161 } 162 163 declare %class.MutexLock* @_ZN9MutexLockC1Ev(%class.MutexLock*) unnamed_addr nounwind align 2 164 165 declare %class.MutexLock* @_ZN9MutexLockD1Ev(%class.MutexLock*) unnamed_addr nounwind align 2 166
