1 ; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-darwin | FileCheck %s --check-prefix=ARM 2 ; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-darwin | FileCheck %s --check-prefix=THUMB 3 4 %struct.A = type { i32, [2 x [2 x i32]], i8, [3 x [3 x [3 x i32]]] } 5 %struct.B = type { i32, [2 x [2 x [2 x %struct.A]]] } 6 7 @arr = common global [2 x [2 x [2 x [2 x [2 x i32]]]]] zeroinitializer, align 4 8 @A = common global [3 x [3 x %struct.A]] zeroinitializer, align 4 9 @B = common global [2 x [2 x [2 x %struct.B]]] zeroinitializer, align 4 10 11 define i32* @t1() nounwind { 12 entry: 13 ; ARM: t1 14 ; THUMB: t1 15 %addr = alloca i32*, align 4 16 store i32* getelementptr inbounds ([2 x [2 x [2 x [2 x [2 x i32]]]]]* @arr, i32 0, i32 1, i32 1, i32 1, i32 1, i32 1), i32** %addr, align 4 17 ; ARM: add r0, r0, #124 18 ; THUMB: adds r0, #124 19 %0 = load i32** %addr, align 4 20 ret i32* %0 21 } 22 23 define i32* @t2() nounwind { 24 entry: 25 ; ARM: t2 26 ; THUMB: t2 27 %addr = alloca i32*, align 4 28 store i32* getelementptr inbounds ([3 x [3 x %struct.A]]* @A, i32 0, i32 2, i32 2, i32 3, i32 1, i32 2, i32 2), i32** %addr, align 4 29 ; ARM: movw r1, #1148 30 ; ARM: add r0, r0, r1 31 ; THUMB: addw r0, r0, #1148 32 %0 = load i32** %addr, align 4 33 ret i32* %0 34 } 35 36 define i32* @t3() nounwind { 37 entry: 38 ; ARM: t3 39 ; THUMB: t3 40 %addr = alloca i32*, align 4 41 store i32* getelementptr inbounds ([3 x [3 x %struct.A]]* @A, i32 0, i32 0, i32 1, i32 1, i32 0, i32 1), i32** %addr, align 4 42 ; ARM: add r0, r0, #140 43 ; THUMB: adds r0, #140 44 %0 = load i32** %addr, align 4 45 ret i32* %0 46 } 47 48 define i32* @t4() nounwind { 49 entry: 50 ; ARM: t4 51 ; THUMB: t4 52 %addr = alloca i32*, align 4 53 store i32* getelementptr inbounds ([2 x [2 x [2 x %struct.B]]]* @B, i32 0, i32 0, i32 0, i32 1, i32 1, i32 0, i32 0, i32 1, i32 3, i32 1, i32 2, i32 1), i32** %addr, align 4 54 ; ARM-NOT: movw r{{[0-9]}}, #1060 55 ; ARM-NOT: add r{{[0-9]}}, r{{[0-9]}}, #4 56 ; ARM-NOT: add r{{[0-9]}}, r{{[0-9]}}, #132 57 ; ARM-NOT: add r{{[0-9]}}, r{{[0-9]}}, #24 58 ; ARM-NOT: add r{{[0-9]}}, r{{[0-9]}}, #36 59 ; ARM-NOT: add r{{[0-9]}}, r{{[0-9]}}, #24 60 ; ARM-NOT: add r{{[0-9]}}, r{{[0-9]}}, #4 61 ; ARM: movw r{{[0-9]}}, #1284 62 ; THUMB: addw r{{[0-9]}}, r{{[0-9]}}, #1284 63 %0 = load i32** %addr, align 4 64 ret i32* %0 65 } 66
