1 ; RUN: llc < %s -march=cellspu > %t1.s 2 ; RUN: grep ila %t1.s | count 6 3 ; RUN: grep ceq %t1.s | count 28 4 ; RUN: grep ceqi %t1.s | count 12 5 ; RUN: grep clgt %t1.s | count 16 6 ; RUN: grep clgti %t1.s | count 6 7 ; RUN: grep cgt %t1.s | count 16 8 ; RUN: grep cgti %t1.s | count 6 9 ; RUN: grep {selb\t\\\$3, \\\$6, \\\$5, \\\$3} %t1.s | count 7 10 ; RUN: grep {selb\t\\\$3, \\\$5, \\\$6, \\\$3} %t1.s | count 3 11 ; RUN: grep {selb\t\\\$3, \\\$5, \\\$4, \\\$3} %t1.s | count 20 12 13 target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128" 14 target triple = "spu" 15 16 ; $3 = %arg1, $4 = %arg2, $5 = %val1, $6 = %val2 17 ; $3 = %arg1, $4 = %val1, $5 = %val2 18 ; 19 ; For "positive" comparisons: 20 ; selb $3, $6, $5, <i1> 21 ; selb $3, $5, $4, <i1> 22 ; 23 ; For "negative" comparisons, i.e., those where the result of the comparison 24 ; must be inverted (setne, for example): 25 ; selb $3, $5, $6, <i1> 26 ; selb $3, $4, $5, <i1> 27 28 ; i32 integer comparisons: 29 define i32 @icmp_eq_select_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind { 30 entry: 31 %A = icmp eq i32 %arg1, %arg2 32 %B = select i1 %A, i32 %val1, i32 %val2 33 ret i32 %B 34 } 35 36 define i1 @icmp_eq_setcc_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind { 37 entry: 38 %A = icmp eq i32 %arg1, %arg2 39 ret i1 %A 40 } 41 42 define i32 @icmp_eq_immed01_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind { 43 entry: 44 %A = icmp eq i32 %arg1, 511 45 %B = select i1 %A, i32 %val1, i32 %val2 46 ret i32 %B 47 } 48 49 define i32 @icmp_eq_immed02_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind { 50 entry: 51 %A = icmp eq i32 %arg1, -512 52 %B = select i1 %A, i32 %val1, i32 %val2 53 ret i32 %B 54 } 55 56 define i32 @icmp_eq_immed03_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind { 57 entry: 58 %A = icmp eq i32 %arg1, -1 59 %B = select i1 %A, i32 %val1, i32 %val2 60 ret i32 %B 61 } 62 63 define i32 @icmp_eq_immed04_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind { 64 entry: 65 %A = icmp eq i32 %arg1, 32768 66 %B = select i1 %A, i32 %val1, i32 %val2 67 ret i32 %B 68 } 69 70 define i32 @icmp_ne_select_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind { 71 entry: 72 %A = icmp ne i32 %arg1, %arg2 73 %B = select i1 %A, i32 %val1, i32 %val2 74 ret i32 %B 75 } 76 77 define i1 @icmp_ne_setcc_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind { 78 entry: 79 %A = icmp ne i32 %arg1, %arg2 80 ret i1 %A 81 } 82 83 define i32 @icmp_ne_immed01_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind { 84 entry: 85 %A = icmp ne i32 %arg1, 511 86 %B = select i1 %A, i32 %val1, i32 %val2 87 ret i32 %B 88 } 89 90 define i32 @icmp_ne_immed02_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind { 91 entry: 92 %A = icmp ne i32 %arg1, -512 93 %B = select i1 %A, i32 %val1, i32 %val2 94 ret i32 %B 95 } 96 97 define i32 @icmp_ne_immed03_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind { 98 entry: 99 %A = icmp ne i32 %arg1, -1 100 %B = select i1 %A, i32 %val1, i32 %val2 101 ret i32 %B 102 } 103 104 define i32 @icmp_ne_immed04_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind { 105 entry: 106 %A = icmp ne i32 %arg1, 32768 107 %B = select i1 %A, i32 %val1, i32 %val2 108 ret i32 %B 109 } 110 111 define i32 @icmp_ugt_select_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind { 112 entry: 113 %A = icmp ugt i32 %arg1, %arg2 114 %B = select i1 %A, i32 %val1, i32 %val2 115 ret i32 %B 116 } 117 118 define i1 @icmp_ugt_setcc_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind { 119 entry: 120 %A = icmp ugt i32 %arg1, %arg2 121 ret i1 %A 122 } 123 124 define i32 @icmp_ugt_immed01_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind { 125 entry: 126 %A = icmp ugt i32 %arg1, 511 127 %B = select i1 %A, i32 %val1, i32 %val2 128 ret i32 %B 129 } 130 131 define i32 @icmp_ugt_immed02_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind { 132 entry: 133 %A = icmp ugt i32 %arg1, 4294966784 134 %B = select i1 %A, i32 %val1, i32 %val2 135 ret i32 %B 136 } 137 138 define i32 @icmp_ugt_immed03_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind { 139 entry: 140 %A = icmp ugt i32 %arg1, 4294967293 141 %B = select i1 %A, i32 %val1, i32 %val2 142 ret i32 %B 143 } 144 145 define i32 @icmp_ugt_immed04_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind { 146 entry: 147 %A = icmp ugt i32 %arg1, 32768 148 %B = select i1 %A, i32 %val1, i32 %val2 149 ret i32 %B 150 } 151 152 define i32 @icmp_uge_select_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind { 153 entry: 154 %A = icmp uge i32 %arg1, %arg2 155 %B = select i1 %A, i32 %val1, i32 %val2 156 ret i32 %B 157 } 158 159 define i1 @icmp_uge_setcc_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind { 160 entry: 161 %A = icmp uge i32 %arg1, %arg2 162 ret i1 %A 163 } 164 165 ;; Note: icmp uge i32 %arg1, <immed> can always be transformed into 166 ;; icmp ugt i32 %arg1, <immed>-1 167 ;; 168 ;; Consequently, even though the patterns exist to match, it's unlikely 169 ;; they'll ever be generated. 170 171 define i32 @icmp_ult_select_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind { 172 entry: 173 %A = icmp ult i32 %arg1, %arg2 174 %B = select i1 %A, i32 %val1, i32 %val2 175 ret i32 %B 176 } 177 178 define i1 @icmp_ult_setcc_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind { 179 entry: 180 %A = icmp ult i32 %arg1, %arg2 181 ret i1 %A 182 } 183 184 define i32 @icmp_ult_immed01_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind { 185 entry: 186 %A = icmp ult i32 %arg1, 511 187 %B = select i1 %A, i32 %val1, i32 %val2 188 ret i32 %B 189 } 190 191 define i32 @icmp_ult_immed02_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind { 192 entry: 193 %A = icmp ult i32 %arg1, 4294966784 194 %B = select i1 %A, i32 %val1, i32 %val2 195 ret i32 %B 196 } 197 198 define i32 @icmp_ult_immed03_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind { 199 entry: 200 %A = icmp ult i32 %arg1, 4294967293 201 %B = select i1 %A, i32 %val1, i32 %val2 202 ret i32 %B 203 } 204 205 define i32 @icmp_ult_immed04_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind { 206 entry: 207 %A = icmp ult i32 %arg1, 32768 208 %B = select i1 %A, i32 %val1, i32 %val2 209 ret i32 %B 210 } 211 212 define i32 @icmp_ule_select_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind { 213 entry: 214 %A = icmp ule i32 %arg1, %arg2 215 %B = select i1 %A, i32 %val1, i32 %val2 216 ret i32 %B 217 } 218 219 define i1 @icmp_ule_setcc_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind { 220 entry: 221 %A = icmp ule i32 %arg1, %arg2 222 ret i1 %A 223 } 224 225 ;; Note: icmp ule i32 %arg1, <immed> can always be transformed into 226 ;; icmp ult i32 %arg1, <immed>+1 227 ;; 228 ;; Consequently, even though the patterns exist to match, it's unlikely 229 ;; they'll ever be generated. 230 231 define i32 @icmp_sgt_select_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind { 232 entry: 233 %A = icmp sgt i32 %arg1, %arg2 234 %B = select i1 %A, i32 %val1, i32 %val2 235 ret i32 %B 236 } 237 238 define i1 @icmp_sgt_setcc_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind { 239 entry: 240 %A = icmp sgt i32 %arg1, %arg2 241 ret i1 %A 242 } 243 244 define i32 @icmp_sgt_immed01_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind { 245 entry: 246 %A = icmp sgt i32 %arg1, 511 247 %B = select i1 %A, i32 %val1, i32 %val2 248 ret i32 %B 249 } 250 251 define i32 @icmp_sgt_immed02_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind { 252 entry: 253 %A = icmp sgt i32 %arg1, 4294966784 254 %B = select i1 %A, i32 %val1, i32 %val2 255 ret i32 %B 256 } 257 258 define i32 @icmp_sgt_immed03_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind { 259 entry: 260 %A = icmp sgt i32 %arg1, 4294967293 261 %B = select i1 %A, i32 %val1, i32 %val2 262 ret i32 %B 263 } 264 265 define i32 @icmp_sgt_immed04_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind { 266 entry: 267 %A = icmp sgt i32 %arg1, 32768 268 %B = select i1 %A, i32 %val1, i32 %val2 269 ret i32 %B 270 } 271 272 define i32 @icmp_sge_select_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind { 273 entry: 274 %A = icmp sge i32 %arg1, %arg2 275 %B = select i1 %A, i32 %val1, i32 %val2 276 ret i32 %B 277 } 278 279 define i1 @icmp_sge_setcc_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind { 280 entry: 281 %A = icmp sge i32 %arg1, %arg2 282 ret i1 %A 283 } 284 285 ;; Note: icmp sge i32 %arg1, <immed> can always be transformed into 286 ;; icmp sgt i32 %arg1, <immed>-1 287 ;; 288 ;; Consequently, even though the patterns exist to match, it's unlikely 289 ;; they'll ever be generated. 290 291 define i32 @icmp_slt_select_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind { 292 entry: 293 %A = icmp slt i32 %arg1, %arg2 294 %B = select i1 %A, i32 %val1, i32 %val2 295 ret i32 %B 296 } 297 298 define i1 @icmp_slt_setcc_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind { 299 entry: 300 %A = icmp slt i32 %arg1, %arg2 301 ret i1 %A 302 } 303 304 define i32 @icmp_slt_immed01_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind { 305 entry: 306 %A = icmp slt i32 %arg1, 511 307 %B = select i1 %A, i32 %val1, i32 %val2 308 ret i32 %B 309 } 310 311 define i32 @icmp_slt_immed02_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind { 312 entry: 313 %A = icmp slt i32 %arg1, -512 314 %B = select i1 %A, i32 %val1, i32 %val2 315 ret i32 %B 316 } 317 318 define i32 @icmp_slt_immed03_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind { 319 entry: 320 %A = icmp slt i32 %arg1, -1 321 %B = select i1 %A, i32 %val1, i32 %val2 322 ret i32 %B 323 } 324 325 define i32 @icmp_slt_immed04_i32(i32 %arg1, i32 %val1, i32 %val2) nounwind { 326 entry: 327 %A = icmp slt i32 %arg1, 32768 328 %B = select i1 %A, i32 %val1, i32 %val2 329 ret i32 %B 330 } 331 332 define i32 @icmp_sle_select_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind { 333 entry: 334 %A = icmp sle i32 %arg1, %arg2 335 %B = select i1 %A, i32 %val1, i32 %val2 336 ret i32 %B 337 } 338 339 define i1 @icmp_sle_setcc_i32(i32 %arg1, i32 %arg2, i32 %val1, i32 %val2) nounwind { 340 entry: 341 %A = icmp sle i32 %arg1, %arg2 342 ret i1 %A 343 } 344 345 ;; Note: icmp sle i32 %arg1, <immed> can always be transformed into 346 ;; icmp slt i32 %arg1, <immed>+1 347 ;; 348 ;; Consequently, even though the patterns exist to match, it's unlikely 349 ;; they'll ever be generated. 350 351