1 ; RUN: llc < %s 2 3 4 ; PR5421 5 define void @test1() { 6 entry: 7 switch i128 undef, label %exit [ 8 i128 55340232221128654848, label %exit 9 i128 92233720368547758080, label %exit 10 i128 73786976294838206464, label %exit 11 i128 147573952589676412928, label %exit 12 ] 13 exit: 14 unreachable 15 } 16 17 18 ; PR1197 19 define void @test2() { 20 entry: 21 br i1 false, label %cond_next954, label %cond_true924 22 23 cond_true924: ; preds = %entry 24 ret void 25 26 cond_next954: ; preds = %entry 27 switch i8 0, label %cleanup7419 [ 28 i8 1, label %bb956 29 i8 2, label %bb1069 30 i8 4, label %bb7328 31 i8 5, label %bb1267 32 i8 8, label %bb1348 33 i8 9, label %bb7328 34 i8 11, label %bb1439 35 i8 12, label %bb1484 36 i8 13, label %bb1706 37 i8 14, label %bb1783 38 i8 17, label %bb1925 39 i8 18, label %bb1929 40 i8 19, label %bb2240 41 i8 25, label %bb2447 42 i8 27, label %bb2480 43 i8 29, label %bb2590 44 i8 30, label %bb2594 45 i8 31, label %bb2621 46 i8 32, label %bb2664 47 i8 33, label %bb2697 48 i8 34, label %bb2735 49 i8 37, label %bb2786 50 i8 38, label %bb2849 51 i8 39, label %bb3269 52 i8 41, label %bb3303 53 i8 42, label %bb3346 54 i8 43, label %bb3391 55 i8 44, label %bb3395 56 i8 50, label %bb3673 57 i8 52, label %bb3677 58 i8 53, label %bb3693 59 i8 54, label %bb7328 60 i8 56, label %bb3758 61 i8 57, label %bb3787 62 i8 64, label %bb5019 63 i8 68, label %cond_true4235 64 i8 69, label %bb4325 65 i8 70, label %bb4526 66 i8 72, label %bb4618 67 i8 73, label %bb4991 68 i8 80, label %bb5012 69 i8 82, label %bb5019 70 i8 84, label %bb5518 71 i8 86, label %bb5752 72 i8 87, label %bb5953 73 i8 89, label %bb6040 74 i8 90, label %bb6132 75 i8 92, label %bb6186 76 i8 93, label %bb6151 77 i8 94, label %bb6155 78 i8 97, label %bb6355 79 i8 98, label %bb5019 80 i8 99, label %bb6401 81 i8 101, label %bb5019 82 i8 102, label %bb1484 83 i8 104, label %bb7064 84 i8 105, label %bb7068 85 i8 106, label %bb7072 86 i8 108, label %bb1065 87 i8 109, label %bb1702 88 i8 110, label %bb2200 89 i8 111, label %bb2731 90 i8 112, label %bb2782 91 i8 113, label %bb2845 92 i8 114, label %bb2875 93 i8 115, label %bb3669 94 i8 116, label %bb7316 95 i8 117, label %bb7316 96 i8 118, label %bb3875 97 i8 119, label %bb4359 98 i8 120, label %bb4987 99 i8 121, label %bb5008 100 i8 122, label %bb5786 101 i8 123, label %bb6147 102 i8 124, label %bb6916 103 i8 125, label %bb6920 104 i8 126, label %bb6955 105 i8 127, label %bb6990 106 i8 -128, label %bb7027 107 i8 -127, label %bb3879 108 i8 -126, label %bb4700 109 i8 -125, label %bb7076 110 i8 -124, label %bb2366 111 i8 -123, label %bb2366 112 i8 -122, label %bb5490 113 ] 114 115 bb956: ; preds = %cond_next954 116 ret void 117 118 bb1065: ; preds = %cond_next954 119 ret void 120 121 bb1069: ; preds = %cond_next954 122 ret void 123 124 bb1267: ; preds = %cond_next954 125 ret void 126 127 bb1348: ; preds = %cond_next954 128 ret void 129 130 bb1439: ; preds = %cond_next954 131 ret void 132 133 bb1484: ; preds = %cond_next954, %cond_next954 134 ret void 135 136 bb1702: ; preds = %cond_next954 137 ret void 138 139 bb1706: ; preds = %cond_next954 140 ret void 141 142 bb1783: ; preds = %cond_next954 143 ret void 144 145 bb1925: ; preds = %cond_next954 146 ret void 147 148 bb1929: ; preds = %cond_next954 149 ret void 150 151 bb2200: ; preds = %cond_next954 152 ret void 153 154 bb2240: ; preds = %cond_next954 155 ret void 156 157 bb2366: ; preds = %cond_next954, %cond_next954 158 ret void 159 160 bb2447: ; preds = %cond_next954 161 ret void 162 163 bb2480: ; preds = %cond_next954 164 ret void 165 166 bb2590: ; preds = %cond_next954 167 ret void 168 169 bb2594: ; preds = %cond_next954 170 ret void 171 172 bb2621: ; preds = %cond_next954 173 ret void 174 175 bb2664: ; preds = %cond_next954 176 ret void 177 178 bb2697: ; preds = %cond_next954 179 ret void 180 181 bb2731: ; preds = %cond_next954 182 ret void 183 184 bb2735: ; preds = %cond_next954 185 ret void 186 187 bb2782: ; preds = %cond_next954 188 ret void 189 190 bb2786: ; preds = %cond_next954 191 ret void 192 193 bb2845: ; preds = %cond_next954 194 ret void 195 196 bb2849: ; preds = %cond_next954 197 ret void 198 199 bb2875: ; preds = %cond_next954 200 ret void 201 202 bb3269: ; preds = %cond_next954 203 ret void 204 205 bb3303: ; preds = %cond_next954 206 ret void 207 208 bb3346: ; preds = %cond_next954 209 ret void 210 211 bb3391: ; preds = %cond_next954 212 ret void 213 214 bb3395: ; preds = %cond_next954 215 ret void 216 217 bb3669: ; preds = %cond_next954 218 ret void 219 220 bb3673: ; preds = %cond_next954 221 ret void 222 223 bb3677: ; preds = %cond_next954 224 ret void 225 226 bb3693: ; preds = %cond_next954 227 ret void 228 229 bb3758: ; preds = %cond_next954 230 ret void 231 232 bb3787: ; preds = %cond_next954 233 ret void 234 235 bb3875: ; preds = %cond_next954 236 ret void 237 238 bb3879: ; preds = %cond_next954 239 ret void 240 241 cond_true4235: ; preds = %cond_next954 242 ret void 243 244 bb4325: ; preds = %cond_next954 245 ret void 246 247 bb4359: ; preds = %cond_next954 248 ret void 249 250 bb4526: ; preds = %cond_next954 251 ret void 252 253 bb4618: ; preds = %cond_next954 254 ret void 255 256 bb4700: ; preds = %cond_next954 257 ret void 258 259 bb4987: ; preds = %cond_next954 260 ret void 261 262 bb4991: ; preds = %cond_next954 263 ret void 264 265 bb5008: ; preds = %cond_next954 266 ret void 267 268 bb5012: ; preds = %cond_next954 269 ret void 270 271 bb5019: ; preds = %cond_next954, %cond_next954, %cond_next954, %cond_next954 272 ret void 273 274 bb5490: ; preds = %cond_next954 275 ret void 276 277 bb5518: ; preds = %cond_next954 278 ret void 279 280 bb5752: ; preds = %cond_next954 281 ret void 282 283 bb5786: ; preds = %cond_next954 284 ret void 285 286 bb5953: ; preds = %cond_next954 287 ret void 288 289 bb6040: ; preds = %cond_next954 290 ret void 291 292 bb6132: ; preds = %cond_next954 293 ret void 294 295 bb6147: ; preds = %cond_next954 296 ret void 297 298 bb6151: ; preds = %cond_next954 299 ret void 300 301 bb6155: ; preds = %cond_next954 302 ret void 303 304 bb6186: ; preds = %cond_next954 305 ret void 306 307 bb6355: ; preds = %cond_next954 308 ret void 309 310 bb6401: ; preds = %cond_next954 311 ret void 312 313 bb6916: ; preds = %cond_next954 314 ret void 315 316 bb6920: ; preds = %cond_next954 317 ret void 318 319 bb6955: ; preds = %cond_next954 320 ret void 321 322 bb6990: ; preds = %cond_next954 323 ret void 324 325 bb7027: ; preds = %cond_next954 326 ret void 327 328 bb7064: ; preds = %cond_next954 329 ret void 330 331 bb7068: ; preds = %cond_next954 332 ret void 333 334 bb7072: ; preds = %cond_next954 335 ret void 336 337 bb7076: ; preds = %cond_next954 338 ret void 339 340 bb7316: ; preds = %cond_next954, %cond_next954 341 ret void 342 343 bb7328: ; preds = %cond_next954, %cond_next954, %cond_next954 344 ret void 345 346 cleanup7419: ; preds = %cond_next954 347 ret void 348 } 349
