1 ; RUN: llc < %s -march=mips64el -mcpu=mips64 -mattr=n64 | FileCheck %s -check-prefix=CHECK-N64 2 ; RUN: llc < %s -march=mips64el -mcpu=mips64 -mattr=n32 | FileCheck %s -check-prefix=CHECK-N32 3 4 @c = common global i8 0, align 4 5 @s = common global i16 0, align 4 6 @i = common global i32 0, align 4 7 @l = common global i64 0, align 8 8 @uc = common global i8 0, align 4 9 @us = common global i16 0, align 4 10 @ui = common global i32 0, align 4 11 @l1 = common global i64 0, align 8 12 13 define i64 @func1() nounwind readonly { 14 entry: 15 ; CHECK-N64: func1 16 ; CHECK-N64: ld $[[R0:[0-9]+]], %got_disp(c) 17 ; CHECK-N64: lb ${{[0-9]+}}, 0($[[R0]]) 18 ; CHECK-N32: func1 19 ; CHECK-N32: lw $[[R0:[0-9]+]], %got_disp(c) 20 ; CHECK-N32: lb ${{[0-9]+}}, 0($[[R0]]) 21 %0 = load i8* @c, align 4 22 %conv = sext i8 %0 to i64 23 ret i64 %conv 24 } 25 26 define i64 @func2() nounwind readonly { 27 entry: 28 ; CHECK-N64: func2 29 ; CHECK-N64: ld $[[R0:[0-9]+]], %got_disp(s) 30 ; CHECK-N64: lh ${{[0-9]+}}, 0($[[R0]]) 31 ; CHECK-N32: func2 32 ; CHECK-N32: lw $[[R0:[0-9]+]], %got_disp(s) 33 ; CHECK-N32: lh ${{[0-9]+}}, 0($[[R0]]) 34 %0 = load i16* @s, align 4 35 %conv = sext i16 %0 to i64 36 ret i64 %conv 37 } 38 39 define i64 @func3() nounwind readonly { 40 entry: 41 ; CHECK-N64: func3 42 ; CHECK-N64: ld $[[R0:[0-9]+]], %got_disp(i) 43 ; CHECK-N64: lw ${{[0-9]+}}, 0($[[R0]]) 44 ; CHECK-N32: func3 45 ; CHECK-N32: lw $[[R0:[0-9]+]], %got_disp(i) 46 ; CHECK-N32: lw ${{[0-9]+}}, 0($[[R0]]) 47 %0 = load i32* @i, align 4 48 %conv = sext i32 %0 to i64 49 ret i64 %conv 50 } 51 52 define i64 @func4() nounwind readonly { 53 entry: 54 ; CHECK-N64: func4 55 ; CHECK-N64: ld $[[R0:[0-9]+]], %got_disp(l) 56 ; CHECK-N64: ld ${{[0-9]+}}, 0($[[R0]]) 57 ; CHECK-N32: func4 58 ; CHECK-N32: lw $[[R0:[0-9]+]], %got_disp(l) 59 ; CHECK-N32: ld ${{[0-9]+}}, 0($[[R0]]) 60 %0 = load i64* @l, align 8 61 ret i64 %0 62 } 63 64 define i64 @ufunc1() nounwind readonly { 65 entry: 66 ; CHECK-N64: ufunc1 67 ; CHECK-N64: ld $[[R0:[0-9]+]], %got_disp(uc) 68 ; CHECK-N64: lbu ${{[0-9]+}}, 0($[[R0]]) 69 ; CHECK-N32: ufunc1 70 ; CHECK-N32: lw $[[R0:[0-9]+]], %got_disp(uc) 71 ; CHECK-N32: lbu ${{[0-9]+}}, 0($[[R0]]) 72 %0 = load i8* @uc, align 4 73 %conv = zext i8 %0 to i64 74 ret i64 %conv 75 } 76 77 define i64 @ufunc2() nounwind readonly { 78 entry: 79 ; CHECK-N64: ufunc2 80 ; CHECK-N64: ld $[[R0:[0-9]+]], %got_disp(us) 81 ; CHECK-N64: lhu ${{[0-9]+}}, 0($[[R0]]) 82 ; CHECK-N32: ufunc2 83 ; CHECK-N32: lw $[[R0:[0-9]+]], %got_disp(us) 84 ; CHECK-N32: lhu ${{[0-9]+}}, 0($[[R0]]) 85 %0 = load i16* @us, align 4 86 %conv = zext i16 %0 to i64 87 ret i64 %conv 88 } 89 90 define i64 @ufunc3() nounwind readonly { 91 entry: 92 ; CHECK-N64: ufunc3 93 ; CHECK-N64: ld $[[R0:[0-9]+]], %got_disp(ui) 94 ; CHECK-N64: lwu ${{[0-9]+}}, 0($[[R0]]) 95 ; CHECK-N32: ufunc3 96 ; CHECK-N32: lw $[[R0:[0-9]+]], %got_disp(ui) 97 ; CHECK-N32: lwu ${{[0-9]+}}, 0($[[R0]]) 98 %0 = load i32* @ui, align 4 99 %conv = zext i32 %0 to i64 100 ret i64 %conv 101 } 102 103 define void @sfunc1() nounwind { 104 entry: 105 ; CHECK-N64: sfunc1 106 ; CHECK-N64: ld $[[R0:[0-9]+]], %got_disp(c) 107 ; CHECK-N64: sb ${{[0-9]+}}, 0($[[R0]]) 108 ; CHECK-N32: sfunc1 109 ; CHECK-N32: lw $[[R0:[0-9]+]], %got_disp(c) 110 ; CHECK-N32: sb ${{[0-9]+}}, 0($[[R0]]) 111 %0 = load i64* @l1, align 8 112 %conv = trunc i64 %0 to i8 113 store i8 %conv, i8* @c, align 4 114 ret void 115 } 116 117 define void @sfunc2() nounwind { 118 entry: 119 ; CHECK-N64: sfunc2 120 ; CHECK-N64: ld $[[R0:[0-9]+]], %got_disp(s) 121 ; CHECK-N64: sh ${{[0-9]+}}, 0($[[R0]]) 122 ; CHECK-N32: sfunc2 123 ; CHECK-N32: lw $[[R0:[0-9]+]], %got_disp(s) 124 ; CHECK-N32: sh ${{[0-9]+}}, 0($[[R0]]) 125 %0 = load i64* @l1, align 8 126 %conv = trunc i64 %0 to i16 127 store i16 %conv, i16* @s, align 4 128 ret void 129 } 130 131 define void @sfunc3() nounwind { 132 entry: 133 ; CHECK-N64: sfunc3 134 ; CHECK-N64: ld $[[R0:[0-9]+]], %got_disp(i) 135 ; CHECK-N64: sw ${{[0-9]+}}, 0($[[R0]]) 136 ; CHECK-N32: sfunc3 137 ; CHECK-N32: lw $[[R0:[0-9]+]], %got_disp(i) 138 ; CHECK-N32: sw ${{[0-9]+}}, 0($[[R0]]) 139 %0 = load i64* @l1, align 8 140 %conv = trunc i64 %0 to i32 141 store i32 %conv, i32* @i, align 4 142 ret void 143 } 144 145 define void @sfunc4() nounwind { 146 entry: 147 ; CHECK-N64: sfunc4 148 ; CHECK-N64: ld $[[R0:[0-9]+]], %got_disp(l) 149 ; CHECK-N64: sd ${{[0-9]+}}, 0($[[R0]]) 150 ; CHECK-N32: sfunc4 151 ; CHECK-N32: lw $[[R0:[0-9]+]], %got_disp(l) 152 ; CHECK-N32: sd ${{[0-9]+}}, 0($[[R0]]) 153 %0 = load i64* @l1, align 8 154 store i64 %0, i64* @l, align 8 155 ret void 156 } 157 158
