1 ; RUN: llc < %s -march=ppc32 -mcpu=g5 | not grep CPI 2 3 define void @test1(<4 x i32>* %P1, <4 x i32>* %P2, <4 x float>* %P3) nounwind { 4 %tmp = load <4 x i32>* %P1 ; <<4 x i32>> [#uses=1] 5 %tmp4 = and <4 x i32> %tmp, < i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648 > ; <<4 x i32>> [#uses=1] 6 store <4 x i32> %tmp4, <4 x i32>* %P1 7 %tmp7 = load <4 x i32>* %P2 ; <<4 x i32>> [#uses=1] 8 %tmp9 = and <4 x i32> %tmp7, < i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647 > ; <<4 x i32>> [#uses=1] 9 store <4 x i32> %tmp9, <4 x i32>* %P2 10 %tmp.upgrd.1 = load <4 x float>* %P3 ; <<4 x float>> [#uses=1] 11 %tmp11 = bitcast <4 x float> %tmp.upgrd.1 to <4 x i32> ; <<4 x i32>> [#uses=1] 12 %tmp12 = and <4 x i32> %tmp11, < i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647 > ; <<4 x i32>> [#uses=1] 13 %tmp13 = bitcast <4 x i32> %tmp12 to <4 x float> ; <<4 x float>> [#uses=1] 14 store <4 x float> %tmp13, <4 x float>* %P3 15 ret void 16 } 17 18 define <4 x i32> @test_30() nounwind { 19 ret <4 x i32> < i32 30, i32 30, i32 30, i32 30 > 20 } 21 22 define <4 x i32> @test_29() nounwind { 23 ret <4 x i32> < i32 29, i32 29, i32 29, i32 29 > 24 } 25 26 define <8 x i16> @test_n30() nounwind { 27 ret <8 x i16> < i16 -30, i16 -30, i16 -30, i16 -30, i16 -30, i16 -30, i16 -30, i16 -30 > 28 } 29 30 define <16 x i8> @test_n104() nounwind { 31 ret <16 x i8> < i8 -104, i8 -104, i8 -104, i8 -104, i8 -104, i8 -104, i8 -104, i8 -104, i8 -104, i8 -104, i8 -104, i8 -104, i8 -104, i8 -104, i8 -104, i8 -104 > 32 } 33 34 define <4 x i32> @test_vsldoi() nounwind { 35 ret <4 x i32> < i32 512, i32 512, i32 512, i32 512 > 36 } 37 38 define <8 x i16> @test_vsldoi_65023() nounwind { 39 ret <8 x i16> < i16 65023, i16 65023,i16 65023,i16 65023,i16 65023,i16 65023,i16 65023,i16 65023 > 40 } 41 42 define <4 x i32> @test_rol() nounwind { 43 ret <4 x i32> < i32 -11534337, i32 -11534337, i32 -11534337, i32 -11534337 > 44 } 45
