1 ; RUN: llc < %s -march=xcore -mcpu=xs1b-generic | FileCheck %s 2 3 define i32 *@addr_G1() { 4 entry: 5 ; CHECK: addr_G1: 6 ; CHECK: ldaw r0, dp[G1] 7 ret i32* @G1 8 } 9 10 define i32 *@addr_G2() { 11 entry: 12 ; CHECK: addr_G2: 13 ; CHECK: ldaw r0, dp[G2] 14 ret i32* @G2 15 } 16 17 define i32 *@addr_G3() { 18 entry: 19 ; CHECK: addr_G3: 20 ; CHECK: ldaw r11, cp[G3] 21 ; CHECK: mov r0, r11 22 ret i32* @G3 23 } 24 25 define i32 **@addr_G4() { 26 entry: 27 ; CHECK: addr_G4: 28 ; CHECK: ldaw r0, dp[G4] 29 ret i32** @G4 30 } 31 32 define i32 **@addr_G5() { 33 entry: 34 ; CHECK: addr_G5: 35 ; CHECK: ldaw r11, cp[G5] 36 ; CHECK: mov r0, r11 37 ret i32** @G5 38 } 39 40 define i32 **@addr_G6() { 41 entry: 42 ; CHECK: addr_G6: 43 ; CHECK: ldaw r0, dp[G6] 44 ret i32** @G6 45 } 46 47 define i32 **@addr_G7() { 48 entry: 49 ; CHECK: addr_G7: 50 ; CHECK: ldaw r11, cp[G7] 51 ; CHECK: mov r0, r11 52 ret i32** @G7 53 } 54 55 define i32 *@addr_G8() { 56 entry: 57 ; CHECK: addr_G8: 58 ; CHECK: ldaw r0, dp[G8] 59 ret i32* @G8 60 } 61 62 @G1 = global i32 4712 63 ; CHECK: .section .dp.data,"awd",@progbits 64 ; CHECK: G1: 65 66 @G2 = global i32 0 67 ; CHECK: .section .dp.bss,"awd",@nobits 68 ; CHECK: G2: 69 70 @G3 = unnamed_addr constant i32 9401 71 ; CHECK: .section .cp.rodata.cst4,"aMc",@progbits,4 72 ; CHECK: G3: 73 74 @G4 = global i32* @G1 75 ; CHECK: .section .dp.data,"awd",@progbits 76 ; CHECK: G4: 77 78 @G5 = unnamed_addr constant i32* @G1 79 ; CHECK: .section .cp.rodata,"ac",@progbits 80 ; CHECK: G5: 81 82 @G6 = global i32* @G8 83 ; CHECK: .section .dp.data,"awd",@progbits 84 ; CHECK: G6: 85 86 @G7 = unnamed_addr constant i32* @G8 87 ; CHECK: .section .cp.rodata,"ac",@progbits 88 ; CHECK: G7: 89 90 @G8 = internal global i32 9312 91 ; CHECK: .section .dp.data,"awd",@progbits 92 ; CHECK: G8: 93