1 /* Copyright (C) 2007-2008 The Android Open Source Project 2 ** 3 ** This software is licensed under the terms of the GNU General Public 4 ** License version 2, as published by the Free Software Foundation, and 5 ** may be copied, distributed, and modified under those terms. 6 ** 7 ** This program is distributed in the hope that it will be useful, 8 ** but WITHOUT ANY WARRANTY; without even the implied warranty of 9 ** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 10 ** GNU General Public License for more details. 11 */ 12 #include "hw.h" 13 #include "boards.h" 14 #include "devices.h" 15 #include "net.h" 16 #include "arm_pic.h" 17 #include "sysemu.h" 18 #include "goldfish_device.h" 19 #include "android/globals.h" 20 #include "audio/audio.h" 21 #include "arm-misc.h" 22 #include "console.h" 23 #include "blockdev.h" 24 #include "goldfish_pipe.h" 25 #ifdef CONFIG_MEMCHECK 26 #include "memcheck/memcheck_api.h" 27 #endif // CONFIG_MEMCHECK 28 29 #include "android/utils/debug.h" 30 31 #define D(...) VERBOSE_PRINT(init,__VA_ARGS__) 32 33 #define ARM_CPU_SAVE_VERSION 1 34 35 char* audio_input_source = NULL; 36 37 void goldfish_memlog_init(uint32_t base); 38 39 static struct goldfish_device event0_device = { 40 .name = "goldfish_events", 41 .id = 0, 42 .size = 0x1000, 43 .irq_count = 1 44 }; 45 46 static struct goldfish_device nand_device = { 47 .name = "goldfish_nand", 48 .id = 0, 49 .size = 0x1000 50 }; 51 52 /* Board init. */ 53 54 #define TEST_SWITCH 1 55 #if TEST_SWITCH 56 uint32_t switch_test_write(void *opaque, uint32_t state) 57 { 58 goldfish_switch_set_state(opaque, state); 59 return state; 60 } 61 #endif 62 static void android_arm_init_(ram_addr_t ram_size, 63 const char *boot_device, 64 const char *kernel_filename, 65 const char *kernel_cmdline, 66 const char *initrd_filename, 67 const char *cpu_model) 68 { 69 CPUState *env; 70 qemu_irq *cpu_pic; 71 qemu_irq *goldfish_pic; 72 int i; 73 struct arm_boot_info info; 74 ram_addr_t ram_offset; 75 76 if (!cpu_model) 77 cpu_model = "arm926"; 78 79 env = cpu_init(cpu_model); 80 81 ram_offset = qemu_ram_alloc(NULL,"android_arm",ram_size); 82 cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM); 83 84 cpu_pic = arm_pic_init_cpu(env); 85 goldfish_pic = goldfish_interrupt_init(0xff000000, cpu_pic[ARM_PIC_CPU_IRQ], cpu_pic[ARM_PIC_CPU_FIQ]); 86 goldfish_device_init(goldfish_pic, 0xff010000, 0x7f0000, 10, 22); 87 88 goldfish_device_bus_init(0xff001000, 1); 89 90 goldfish_timer_and_rtc_init(0xff003000, 3); 91 92 goldfish_tty_add(serial_hds[0], 0, 0xff002000, 4); 93 for(i = 1; i < MAX_SERIAL_PORTS; i++) { 94 //printf("android_arm_init serial %d %x\n", i, serial_hds[i]); 95 if(serial_hds[i]) { 96 goldfish_tty_add(serial_hds[i], i, 0, 0); 97 } 98 } 99 100 for(i = 0; i < MAX_NICS; i++) { 101 if (nd_table[i].vlan) { 102 if (nd_table[i].model == NULL 103 || strcmp(nd_table[i].model, "smc91c111") == 0) { 104 struct goldfish_device *smc_device; 105 smc_device = qemu_mallocz(sizeof(*smc_device)); 106 smc_device->name = "smc91x"; 107 smc_device->id = i; 108 smc_device->size = 0x1000; 109 smc_device->irq_count = 1; 110 goldfish_add_device_no_io(smc_device); 111 smc91c111_init(&nd_table[i], smc_device->base, goldfish_pic[smc_device->irq]); 112 } else { 113 fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd_table[0].model); 114 exit (1); 115 } 116 } 117 } 118 119 goldfish_fb_init(0); 120 #ifdef HAS_AUDIO 121 goldfish_audio_init(0xff004000, 0, audio_input_source); 122 #endif 123 { 124 DriveInfo* info = drive_get( IF_IDE, 0, 0 ); 125 if (info != NULL) { 126 goldfish_mmc_init(0xff005000, 0, info->bdrv); 127 } 128 } 129 130 goldfish_memlog_init(0xff006000); 131 132 if (android_hw->hw_battery) 133 goldfish_battery_init(); 134 135 goldfish_add_device_no_io(&event0_device); 136 events_dev_init(event0_device.base, goldfish_pic[event0_device.irq]); 137 138 #ifdef CONFIG_NAND 139 goldfish_add_device_no_io(&nand_device); 140 nand_dev_init(nand_device.base); 141 #endif 142 #ifdef CONFIG_TRACE 143 extern const char *trace_filename; 144 /* Init trace device if either tracing, or memory checking is enabled. */ 145 if (trace_filename != NULL 146 #ifdef CONFIG_MEMCHECK 147 || memcheck_enabled 148 #endif // CONFIG_MEMCHECK 149 ) { 150 trace_dev_init(); 151 } 152 if (trace_filename != NULL) { 153 D( "Trace file name is set to %s\n", trace_filename ); 154 } else { 155 D("Trace file name is not set\n"); 156 } 157 #endif 158 159 pipe_dev_init(); 160 161 #if TEST_SWITCH 162 { 163 void *sw; 164 sw = goldfish_switch_add("test", NULL, NULL, 0); 165 goldfish_switch_set_state(sw, 1); 166 goldfish_switch_add("test2", switch_test_write, sw, 1); 167 } 168 #endif 169 170 memset(&info, 0, sizeof info); 171 info.ram_size = ram_size; 172 info.kernel_filename = kernel_filename; 173 info.kernel_cmdline = kernel_cmdline; 174 info.initrd_filename = initrd_filename; 175 info.nb_cpus = 1; 176 info.board_id = 1441; 177 178 arm_load_kernel(env, &info); 179 } 180 181 QEMUMachine android_arm_machine = { 182 "android_arm", 183 "ARM Android Emulator", 184 android_arm_init_, 185 0, 186 0, 187 1, 188 NULL 189 }; 190 191 static void android_arm_init(void) 192 { 193 qemu_register_machine(&android_arm_machine); 194 } 195 196 machine_init(android_arm_init); 197
