Lines Matching refs:isAdd
442 bool isAdd = true;
447 isAdd = false;
453 isAdd = false;
457 return isAdd;
727 bool isAdd = true;
733 isAdd = false ; // 'U' bit is set as part of the fixup.
752 isAdd = false;
757 isAdd = EncodeAddrModeOpValues(MI, OpIdx, Reg, Imm12, Fixups);
761 if (isAdd)
782 bool isAdd = Imm8 >= 0;
793 if (isAdd)
807 bool isAdd = true;
813 isAdd = false ; // 'U' bit is set as part of the fixup.
822 isAdd = EncodeAddrModeOpValues(MI, OpIdx, Reg, Imm8, Fixups);
832 if (isAdd)
933 bool isAdd = ARM_AM::getAM2Op(MO2.getImm()) == ARM_AM::add;
938 // {12} = isAdd
948 if (isAdd)
958 // {12} isAdd
971 // {12} isAdd
976 bool isAdd = ARM_AM::getAM2Op(Imm) == ARM_AM::add;
986 return Binary | (isAdd << 12) | (isReg << 13);
992 // {4} isAdd
996 bool isAdd = MO1.getImm() != 0;
997 return CTX.getRegisterInfo().getEncodingValue(MO.getReg()) | (isAdd << 4);
1004 // {8} isAdd
1010 bool isAdd = ARM_AM::getAM3Op(Imm) == ARM_AM::add;
1016 return Imm8 | (isAdd << 8) | (isImm << 9);
1024 // {8} isAdd
1045 bool isAdd = ARM_AM::getAM3Op(Imm) == ARM_AM::add;
1051 return (Rn << 9) | Imm8 | (isAdd << 8) | (isImm << 13);
1101 bool isAdd;
1107 isAdd = false; // 'U' bit is handled as part of the fixup.
1121 isAdd = ARM_AM::getAM5Op(Imm8) == ARM_AM::add;
1126 if (isAdd)
