Home | History | Annotate | Download | only in Hexagon

Lines Matching defs:IS

5 // This file is distributed under the University of Illinois Open Source
14 // If no dependency is found, I is added to current packet and machine resource
15 // is marked as taken. If any dependency is found, a target API call is made to
91 // Check if there is a dependence between some instruction already in this
111 // with any other instruction, which means that MI itself is a packet.
114 // isLegalToPacketizeTogether - Is it legal to packetize SUI and SUJ
118 // isLegalToPruneDependencies - Is it legal to prune dependece between SUI
307 // Check if this is a predicate dependence
315 // If we had an attribute for checking if an instruction is an indirect call,
319 // Assumes that the first operand of the CALLr is the function address
1422 // bug 5670: until that is fixed,
1423 // this portion is disabled.
1473 // predicate register is promoted to .new and in the next iteration R2 is
2164 // Returns true if an instruction is predicated on p0 and false if it's
2739 // The 2nd operand is always the post increment operand in load.
2745 // The 1st operand is always the post increment operand in store.
2757 // value being stored is always the last operand.
2768 // Arch Spec 5.4.2.1.TODO: This is not enabled as
2772 // 4. If the instruction that sets a new-value register is conditional, then
2776 // 5. There is an implied restriction of a packet can not have another store,
2777 // if there is a new value store in the packet. Corollary, if there is
2788 // Make sure there is dependency and can be new value'ed
2796 // first operand is always the result
2801 // if there is already an store in the packet, no can do new value store
2832 // if source is post_inc, or absolute-set addressing,
2840 // If the source that feeds the store is predicated, new value store must
2879 // 2) If producer of the new-value register is .new predicated then store
2880 // should also be .new predicated and if producer is not .new predicated
2909 // Following condition is true for all the instructions until PacketMI is
2910 // reached (StartCheck is set to 0 before the for loop).
2911 // StartCheck flag is 1 for all the instructions after PacketMI.
2928 // 1. The only use of reg is DepReg and no other registers.
2942 // 2. If data definition is because of implicit definition of the register,
2981 // This is done as a pass on its own. Don't need to check it here.
2989 // 3. dot new on jump NV/J - V4 -- This is generated in a pass.
3007 !IsNewifyStore(MI)) // MI is not a new-value store
3045 // a)'s P3 is converted to .new form
3046 // Anti Dep between c) and b) is irrelevant for this case
3065 // Make sure that dependency is on the exact register
3108 // then it is not a complement
3121 // If this instruction in the packet is succeeded by the candidate...
3124 // The corner case exist when there is true data
3126 // packet members, this dep is on predicate reg, and
3133 // Here I know that *VIN is predicate setting instruction
3136 // Now I need to see if there is an anti dependency
3149 // Check that the predicate register is the same and
3150 // that the predicate sense is different
3152 // !p0 is not complimentary to p0.new
3184 const InstrStage* IS =
3186 unsigned FuncUnits = IS->getUnits();
3210 // SUI is the current instruction that is out side of the current packet.
3211 // SUJ is the current instruction inside the current packet against which that
3276 // first store is not in SLOT0. New value store, new value jump,
3333 // 2. If the first operand of the nvj is newified, and the second
3334 // operand is also a reg, it (second reg) is not defined in
3336 // 3. If the second operand of the nvj is newified, (which means
3337 // first operand is also a reg), first reg is not defined in
3388 // TODO: Currently, jumpr is handling only return of r31. So, the
3389 // following logic (specificaly IsCallDependent) is working fine.
3392 // of that (IsCallDependent) function. Bug 6216 is opened for this.
3449 // If neither I nor J defines DepReg, then this is a
3454 // and there is an output dependence between the two instructions
3462 // DepReg is the register that's responsible for the dependence.
3498 // For V4, special case ALLOCFRAME. Even though there is dependency
3500 // packetized in a same packet. This implies that the store is using
3514 // Since this store is to be glued with allocframe in the same
3588 "Ensure that there is a slot");
3592 is a slot");
3595 "Ensure that there is a slot");
3631 // In case that "MI" is not an extended insn,