Lines Matching defs:base
194 // Base register is encoded in bits 20-16, offset is encoded in bits 15-0.
282 unsigned base = getMachineOpValue(MI, MI.getOperand(1));
284 // swr src, offset(base)
285 // swl src, offset+3(base)
287 (0x2e << 26) | (base << 21) | (src << 16) | (offset & 0xffff));
289 (0x2a << 26) | (base << 21) | (src << 16) | ((offset+3) & 0xffff));
295 unsigned base = getMachineOpValue(MI, MI.getOperand(1));
298 if (dst != base) {
299 // lwr dst, offset(base)
300 // lwl dst, offset+3(base)
302 (0x26 << 26) | (base << 21) | (dst << 16) | (offset & 0xffff));
304 (0x22 << 26) | (base << 21) | (dst << 16) | ((offset+3) & 0xffff));
307 // lwr at, offset(base)
308 // lwl at, offset+3(base)
311 (0x26 << 26) | (base << 21) | (at << 16) | (offset & 0xffff));
313 (0x22 << 26) | (base << 21) | (at << 16) | ((offset+3) & 0xffff));
322 unsigned base = getMachineOpValue(MI, MI.getOperand(1));
325 // sb src, offset(base)
327 // sb at, offset+1(base)
329 (0x28 << 26) | (base << 21) | (src << 16) | (offset & 0xffff));
333 (0x28 << 26) | (base << 21) | (at << 16) | ((offset+1) & 0xffff));
339 unsigned base = getMachineOpValue(MI, MI.getOperand(1));
342 // lbu at, offset(base)
343 // lb dst, offset+1(base)
347 (0x24 << 26) | (base << 21) | (at << 16) | (offset & 0xffff));
349 (0x20 << 26) | (base << 21) | (dst << 16) | ((offset+1) & 0xffff));
359 unsigned base = getMachineOpValue(MI, MI.getOperand(1));
362 // lbu at, offset(base)
363 // lbu dst, offset+1(base)
367 (0x24 << 26) | (base << 21) | (at << 16) | (offset & 0xffff));
369 (0x24 << 26) | (base << 21) | (dst << 16) | ((offset+1) & 0xffff));
