Lines Matching refs:N0
7080 SDValue N0 = Op.getOperand(0);
7103 return DAG.getNode(Opc, dl, VT, N0, N1, N2);
7118 return DAG.getNode(X86ISD::INSERTPS, dl, VT, N0, N1, N2);
7134 SDValue N0 = Op.getOperand(0);
7147 SDValue V = Extract128BitVector(N0, IdxVal, DAG, dl);
7155 return Insert128BitVector(N0, V, IdxVal, DAG, dl);
7171 return DAG.getNode(X86ISD::PINSRW, dl, VT, N0, N1, N2);
7988 SDValue N0 = Op.getOperand(0);
7994 if (DAG.SignBitIsZero(N0))
7995 return DAG.getNode(ISD::SINT_TO_FP, dl, Op.getValueType(), N0);
7997 EVT SrcVT = N0.getValueType();
8341 SDValue N0 = Op.getOperand(0);
8346 SDValue xFGETSIGN = DAG.getNode(X86ISD::FGETSIGNx86, dl, VT, N0,
14494 SDValue N0 = N->getOperand(0);
14497 EVT VT = N0.getValueType();
14502 N1C && N0.getOpcode() == ISD::AND &&
14503 N0.getOperand(1).getOpcode() == ISD::Constant) {
14504 SDValue N00 = N0.getOperand(0);
14509 APInt Mask = cast<ConstantSDNode>(N0.getOperand(1))->getAPIntValue();
14524 assert(N0.getValueType().isVector() && "Invalid vector shift type");
14530 return DAG.getNode(ISD::ADD, N->getDebugLoc(), VT, N0, N0);
14674 SDValue N0 = N->getOperand(0);
14676 SDValue CMP0 = N0->getOperand(1);
14709 enum X86::CondCode cc0 = (enum X86::CondCode)N0.getConstantOperandVal(0);
14787 SDValue N0 = N->getOperand(0);
14792 if (N0.getOpcode() == ISD::XOR && isAllOnes(N0.getOperand(1)))
14793 return DAG.getNode(X86ISD::ANDN, DL, VT, N0.getOperand(0), N1);
14796 return DAG.getNode(X86ISD::ANDN, DL, VT, N1.getOperand(0), N0);
14799 if (N0.getOpcode() == ISD::SUB && N0.getOperand(1) == N1 &&
14800 isZero(N0.getOperand(0)))
14804 if (N1.getOpcode() == ISD::SUB && N1.getOperand(1) == N0 &&
14806 return DAG.getNode(X86ISD::BLSI, DL, VT, N0);
14809 if (N0.getOpcode() == ISD::ADD && N0.getOperand(0) == N1 &&
14810 isAllOnes(N0.getOperand(1)))
14814 if (N1.getOpcode() == ISD::ADD && N1.getOperand(0) == N0 &&
14816 return DAG.getNode(X86ISD::BLSR, DL, VT, N0);
14828 SDValue N0 = N->getOperand(0);
14833 if (N0.getOpcode() == ISD::XOR &&
14834 //ISD::isBuildVectorAllOnes(N0.getOperand(1).getNode()))
14835 CanFoldXORWithAllOnes(N0.getOperand(1).getNode()))
14836 return DAG.getNode(X86ISD::ANDNP, DL, VT, N0.getOperand(0), N1);
14842 return DAG.getNode(X86ISD::ANDNP, DL, VT, N1.getOperand(0), N0);
14859 SDValue N0 = N->getOperand(0);
14869 if (N0.getOpcode() == X86ISD::ANDNP)
14870 std::swap(N0, N1);
14872 if (N0.getOpcode() == ISD::AND && N1.getOpcode() == X86ISD::ANDNP) {
14876 if (N0.getOperand(0) == Mask)
14877 Y = N0.getOperand(1);
14878 if (N0.getOperand(1) == Mask)
14879 Y = N0.getOperand(0);
14940 if (N0.getOpcode() == ISD::SRL && N1.getOpcode() == ISD::SHL)
14941 std::swap(N0, N1);
14942 if (N0.getOpcode() != ISD::SHL || N1.getOpcode() != ISD::SRL)
14944 if (!N0.hasOneUse() || !N1.hasOneUse())
14947 SDValue ShAmt0 = N0.getOperand(1);
14960 SDValue Op0 = N0.getOperand(0);
14986 N0.getOperand(0), N1.getOperand(0),
15003 SDValue N0 = N->getOperand(0);
15010 N0.getOpcode() == ISD::ADD &&
15011 N0.getOperand(1) == N1 &&
15013 N1.getOperand(0) == N0.getOperand(0))
15018 DAG.getConstant(0, VT), N0.getOperand(0));
15020 SDValue Ops[] = { N0.getOperand(0), Neg,
15054 SDValue N0 = N->getOperand(0);
15058 if (N0.getOpcode() == ISD::ADD && N0.getOperand(0) == N1 &&
15059 isAllOnes(N0.getOperand(1)))
15062 if (N1.getOpcode() == ISD::ADD && N1.getOperand(0) == N0 &&
15064 return DAG.getNode(X86ISD::BLSMSK, DL, VT, N0);
15755 SDValue N0 = N->getOperand(0);
15757 EVT OpVT = N0.getValueType();
15759 if (N0.getOpcode() == ISD::AND &&
15760 N0.hasOneUse() &&
15761 N0.getOperand(0).hasOneUse()) {
15762 SDValue N00 = N0.getOperand(0);
15765 ConstantSDNode *C = dyn_cast<ConstantSDNode>(N0.getOperand(1));
15796 return DAG.getNode(X86ISD::VZEXT_MOVL, dl, VT, N0);
15799 SDValue OpLo = getUnpackl(DAG, dl, OpVT, N0, ZeroVec);
15800 SDValue OpHi = getUnpackh(DAG, dl, OpVT, N0, ZeroVec);
16206 SDValue N0 = Op.getOperand(0);
16208 if (MayFoldLoad(N0) && MayFoldIntoStore(Op))
16221 SDValue N0 = Op.getOperand(0);
16226 if (MayFoldLoad(N0) && (!isa<ConstantSDNode>(N1) || MayFoldIntoStore(Op)))
16228 if (MayFoldLoad(N1) && (!isa<ConstantSDNode>(N0) || MayFoldIntoStore(Op)))
