Lines Matching defs:X86InstrInfo
1 //===-- X86InstrInfo.cpp - X86 Instruction Information --------------------===//
14 #include "X86InstrInfo.h"
93 X86InstrInfo::X86InstrInfo(X86TargetMachine &tm)
1315 X86InstrInfo::AddTableEntry(RegOp2MemOpTableType &R2MTable,
1330 X86InstrInfo::isCoalescableExtInstr(const MachineInstr &MI,
1385 bool X86InstrInfo::isFrameOperand(const MachineInstr *MI, unsigned int Op,
1455 unsigned X86InstrInfo::isLoadFromStackSlot(const MachineInstr *MI,
1463 unsigned X86InstrInfo::isLoadFromStackSlotPostFE(const MachineInstr *MI,
1476 unsigned X86InstrInfo::isStoreToStackSlot(const MachineInstr *MI,
1485 unsigned X86InstrInfo::isStoreToStackSlotPostFE(const MachineInstr *MI,
1517 X86InstrInfo::isReallyTriviallyReMaterializable(const MachineInstr *MI,
1673 void X86InstrInfo::reMaterialize(MachineBasicBlock &MBB,
1733 X86InstrInfo::convertToThreeAddressWithLEA(unsigned MIOpc,
1843 X86InstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI,
2113 X86InstrInfo::commuteInstruction(MachineInstr *MI, bool NewMI) const {
2464 bool X86InstrInfo::isUnpredicatedTerminator(const MachineInstr *MI) const {
2475 bool X86InstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,
2619 unsigned X86InstrInfo::RemoveBranch(MachineBasicBlock &MBB) const {
2640 X86InstrInfo::InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
2688 bool X86InstrInfo::
2725 void X86InstrInfo::insertSelect(MachineBasicBlock &MBB,
2781 void X86InstrInfo::copyPhysReg(MachineBasicBlock &MBB,
2935 void X86InstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
2952 void X86InstrInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg,
2973 void X86InstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
2987 void X86InstrInfo::loadRegFromAddr(MachineFunction &MF, unsigned DestReg,
3005 bool X86InstrInfo::
3157 bool X86InstrInfo::
3392 MachineInstr* X86InstrInfo::
3485 bool X86InstrInfo::expandPostRAPseudo(MachineBasicBlock::iterator MI) const {
3507 X86InstrInfo::emitFrameIndexDebugValue(MachineFunction &MF,
3585 X86InstrInfo::foldMemoryOperandImpl(MachineFunction &MF,
3744 unsigned X86InstrInfo::
3767 void X86InstrInfo::
3790 MachineInstr* X86InstrInfo::foldMemoryOperandImpl(MachineFunction &MF,
3831 MachineInstr* X86InstrInfo::foldMemoryOperandImpl(MachineFunction &MF,
3954 bool X86InstrInfo::canFoldMemoryOperand(const MachineInstr *MI,
4013 bool X86InstrInfo::unfoldMemoryOperand(MachineFunction &MF, MachineInstr *MI,
4139 X86InstrInfo::unfoldMemoryOperand(SelectionDAG &DAG, SDNode *N,
4246 unsigned X86InstrInfo::getOpcodeAfterMemoryUnfold(unsigned Opc,
4265 X86InstrInfo::areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2,
4370 bool X86InstrInfo::shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2,
4419 bool X86InstrInfo::
4429 bool X86InstrInfo::
4443 unsigned X86InstrInfo::getGlobalBaseReg(MachineFunction *MF) const {
4539 X86InstrInfo::getExecutionDomain(const MachineInstr *MI) const {
4550 void X86InstrInfo::setExecutionDomain(MachineInstr *MI, unsigned Domain) const {
4565 void X86InstrInfo::getNoopForMachoTarget(MCInst &NopInst) const {
4569 bool X86InstrInfo::isHighLatencyDef(int opc) const {
4623 bool X86InstrInfo::
4661 const X86InstrInfo *TII = TM->getInstrInfo();
4759 const X86InstrInfo *TII = TM->getInstrInfo();
4780 const X86InstrInfo *TII = TM->getInstrInfo();
