Lines Matching refs:NewMI
1711 MachineInstr *NewMI = prior(I);
1712 NewMI->substituteRegister(Orig->getOperand(0).getReg(), DestReg, SubIdx, TRI);
1813 MachineInstr *NewMI = MIB;
1821 LV->getVarInfo(leaInReg).Kills.push_back(NewMI);
1852 MachineInstr *NewMI = NULL;
1869 NewMI = BuildMI(MF, MI->getDebugLoc(), get(X86::PSHUFDri))
1885 NewMI = BuildMI(MF, MI->getDebugLoc(), get(X86::PSHUFDri))
1902 NewMI = BuildMI(MF, MI->getDebugLoc(), get(X86::LEA64r))
1921 NewMI = BuildMI(MF, MI->getDebugLoc(), get(Opc))
1935 NewMI = BuildMI(MF, MI->getDebugLoc(), get(X86::LEA16r))
1964 NewMI = addOffset(BuildMI(MF, MI->getDebugLoc(), get(Opc))
1973 NewMI = addOffset(BuildMI(MF, MI->getDebugLoc(), get(X86::LEA16r))
1990 NewMI = addOffset(BuildMI(MF, MI->getDebugLoc(), get(Opc))
1999 NewMI = addOffset(BuildMI(MF, MI->getDebugLoc(), get(X86::LEA16r))
2026 NewMI = addRegReg(BuildMI(MF, MI->getDebugLoc(), get(Opc))
2033 NewMI->getOperand(1).setIsUndef(isUndef);
2034 NewMI->getOperand(3).setIsUndef(isUndef2);
2037 LV->replaceKillInstruction(Src2, MI, NewMI);
2047 NewMI = addRegReg(BuildMI(MF, MI->getDebugLoc(), get(X86::LEA16r))
2054 NewMI->getOperand(1).setIsUndef(isUndef);
2055 NewMI->getOperand(3).setIsUndef(isUndef2);
2058 LV->replaceKillInstruction(Src2, MI, NewMI);
2066 NewMI = addOffset(BuildMI(MF, MI->getDebugLoc(), get(X86::LEA64r))
2076 NewMI = addOffset(BuildMI(MF, MI->getDebugLoc(), get(Opc))
2088 NewMI = addOffset(BuildMI(MF, MI->getDebugLoc(), get(X86::LEA16r))
2096 if (!NewMI) return 0;
2100 LV->replaceKillInstruction(Src.getReg(), MI, NewMI);
2102 LV->replaceKillInstruction(Dest.getReg(), MI, NewMI);
2105 MFI->insert(MBBI, NewMI); // Insert the new inst
2106 return NewMI;
2113 X86InstrInfo::commuteInstruction(MachineInstr *MI, bool NewMI) const {
2133 if (NewMI) {
2136 NewMI = false;
2140 return TargetInstrInfoImpl::commuteInstruction(MI, NewMI);
2210 if (NewMI) {
2213 NewMI = false;
2219 return TargetInstrInfoImpl::commuteInstruction(MI, NewMI);
3450 MachineInstr *NewMI = commuteInstruction(MI, false);
3452 if (!NewMI) return 0;
3453 if (NewMI != MI) {
3455 NewMI->eraseFromParent();
3524 MachineInstr *NewMI = MF.CreateMachineInstr(TII.get(Opcode),
3526 MachineInstrBuilder MIB(NewMI);
3550 MachineInstr *NewMI = MF.CreateMachineInstr(TII.get(Opcode),
3552 MachineInstrBuilder MIB(NewMI);
3601 MachineInstr *NewMI = NULL;
3621 NewMI = MakeM0Inst(*this, Opc, MOs, MI);
3622 if (NewMI)
3623 return NewMI;
3663 NewMI = FuseTwoAddrInst(MF, Opcode, MOs, MI, *this);
3665 NewMI = FuseInst(MF, Opcode, i, MOs, MI, *this);
3671 unsigned DstReg = NewMI->getOperand(0).getReg();
3673 NewMI->getOperand(0).setReg(RI.getSubReg(DstReg,
3676 NewMI->getOperand(0).setSubReg(X86::sub_32bit);
3678 return NewMI;
