| /external/llvm/lib/Transforms/IPO/ |
| IPConstantPropagation.cpp | 250 Instruction *Ins = cast<Instruction>(*I);
257 if (ExtractValueInst *EV = dyn_cast<ExtractValueInst>(Ins))
270 Ins->replaceAllUsesWith(New);
271 Ins->eraseFromParent();
|
| PartialInlining.cpp | 93 BasicBlock::iterator Ins = newReturnBlock->begin();
98 PHINode* retPhi = PHINode::Create(OldPhi->getType(), 2, "", Ins);
100 Ins = newReturnBlock->getFirstNonPHI();
|
| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.h | 82 Ins,
128 const SmallVectorImpl<ISD::InputArg> &Ins,
158 const SmallVectorImpl<ISD::InputArg> &Ins,
|
| MipsISelLowering.cpp | 83 case MipsISD::Ins: return "MipsISD::Ins";
683 // Pattern match INS.
686 // => ins $dst, $src, size, pos, $src1
729 return DAG.getNode(MipsISD::Ins, N->getDebugLoc(), ValTy, Shl.getOperand(0),
[all...] |
| /external/llvm/lib/CodeGen/ |
| RegAllocGreedy.cpp | 707 unsigned Ins = 0;
712 BC.Entry = SpillPlacement::MustSpill, ++Ins;
714 BC.Entry = SpillPlacement::PrefSpill, ++Ins;
716 ++Ins;
722 BC.Exit = SpillPlacement::MustSpill, ++Ins;
724 BC.Exit = SpillPlacement::PrefSpill, ++Ins;
726 ++Ins;
730 if (Ins)
731 StaticCost += Ins * SpillPlacer->getBlockFrequency(BC.Number);
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMBaseRegisterInfo.cpp | [all...] |
| ARMISelLowering.cpp | [all...] |
| /external/llvm/utils/TableGen/ |
| CodeGenRegisters.h | 75 std::pair<CompMap::iterator, bool> Ins =
77 return (Ins.second || Ins.first->second == B) ? 0 : Ins.first->second;
|
| CodeGenRegisters.cpp | 308 DenseMap<const CodeGenRegister*, CodeGenSubRegIndex*>::iterator Ins =
310 if (Ins->second == SI->first)
318 SI->first->getName() + " and " + Ins->second->getName());
[all...] |
| /external/llvm/include/llvm/TableGen/ |
| Record.h | [all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.cpp | 344 SmallVectorImpl<ISD::InputArg> &Ins,
356 CCInfo.AnalyzeCallResult(Ins, RetCC_Hexagon);
379 SmallVector<ISD::InputArg, 32> &Ins = CLI.Ins;
423 Outs, OutVals, Ins, DAG);
587 return LowerCallResult(Chain, InFlag, CallConv, isVarArg, Ins, dl, DAG,
805 SmallVectorImpl<ISD::InputArg> &Ins,
822 CCInfo.AnalyzeFormalArguments(Ins, CC_Hexagon);
835 ISD::ArgFlagsTy Flags = Ins[i].Flags;
[all...] |
| /external/llvm/lib/Target/MBlaze/ |
| MBlazeISelLowering.cpp | 690 SmallVector<ISD::InputArg, 32> &Ins = CLI.Ins;
831 if (!Ins.empty())
837 Ins, dl, DAG, InVals);
844 bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins,
852 CCInfo.AnalyzeCallResult(Ins, RetCC_MBlaze);
874 const SmallVectorImpl<ISD::InputArg> &Ins,
[all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.cpp | 249 &Ins,
260 return LowerCCCArguments(Chain, CallConv, isVarArg, Ins, dl, DAG, InVals);
262 if (Ins.empty())
275 SmallVector<ISD::InputArg, 32> &Ins = CLI.Ins;
291 Outs, OutVals, Ins, dl, DAG, InVals);
306 &Ins,
319 CCInfo.AnalyzeFormalArguments(Ins, CC_MSP430);
446 const SmallVectorImpl<ISD::InputArg> &Ins,
558 return LowerCallResult(Chain, InFlag, CallConv, isVarArg, Ins, dl
[all...] |
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXISelLowering.cpp | 448 SmallVector<ISD::InputArg, 32> &Ins = CLI.Ins;
605 if (Ins.size() > 0) {
699 DAG.getConstant(isABI ? ((Ins.size()==0) ? 0 : 1)
750 if (Ins.size() > 0) {
753 for (unsigned i=0,e=Ins.size(); i!=e; ++i) {
754 unsigned sz = Ins[i].VT.getSizeInBits();
755 if (Ins[i].VT.isInteger() && (sz < 8)) sz = 8;
757 LoadRetVTs.push_back(Ins[i].VT);
776 assert(Ins.size() == resvtparts.size() &
[all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | 151 &Ins,
164 CCInfo.AnalyzeFormalArguments(Ins, CC_Sparc32);
171 if (i == 0 && Ins[i].Flags.isSRet()) {
354 SmallVector<ISD::InputArg, 32> &Ins = CLI.Ins;
600 RVInfo.AnalyzeCallResult(Ins, RetCC_Sparc32);
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86FastISel.cpp | [all...] |
| X86ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/CellSPU/ |
| SPUISelLowering.cpp | [all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAGBuilder.cpp | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | [all...] |
