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      1 //===-- FunctionLoweringInfo.h - Lower functions from LLVM IR to CodeGen --===//
      2 //
      3 //                     The LLVM Compiler Infrastructure
      4 //
      5 // This file is distributed under the University of Illinois Open Source
      6 // License. See LICENSE.TXT for details.
      7 //
      8 //===----------------------------------------------------------------------===//
      9 //
     10 // This implements routines for translating functions from LLVM IR into
     11 // Machine IR.
     12 //
     13 //===----------------------------------------------------------------------===//
     14 
     15 #ifndef LLVM_CODEGEN_FUNCTIONLOWERINGINFO_H
     16 #define LLVM_CODEGEN_FUNCTIONLOWERINGINFO_H
     17 
     18 #include "llvm/InlineAsm.h"
     19 #include "llvm/Instructions.h"
     20 #include "llvm/ADT/APInt.h"
     21 #include "llvm/ADT/DenseMap.h"
     22 #include "llvm/ADT/DenseSet.h"
     23 #include "llvm/ADT/IndexedMap.h"
     24 #include "llvm/ADT/SmallPtrSet.h"
     25 #include "llvm/ADT/SmallVector.h"
     26 #include "llvm/Analysis/BranchProbabilityInfo.h"
     27 #include "llvm/CodeGen/ValueTypes.h"
     28 #include "llvm/CodeGen/ISDOpcodes.h"
     29 #include "llvm/CodeGen/MachineBasicBlock.h"
     30 #include "llvm/Support/CallSite.h"
     31 #include "llvm/Target/TargetRegisterInfo.h"
     32 #include <vector>
     33 
     34 namespace llvm {
     35 
     36 class AllocaInst;
     37 class BasicBlock;
     38 class CallInst;
     39 class Function;
     40 class GlobalVariable;
     41 class Instruction;
     42 class MachineInstr;
     43 class MachineBasicBlock;
     44 class MachineFunction;
     45 class MachineModuleInfo;
     46 class MachineRegisterInfo;
     47 class TargetLowering;
     48 class Value;
     49 
     50 //===--------------------------------------------------------------------===//
     51 /// FunctionLoweringInfo - This contains information that is global to a
     52 /// function that is used when lowering a region of the function.
     53 ///
     54 class FunctionLoweringInfo {
     55 public:
     56   const TargetLowering &TLI;
     57   const Function *Fn;
     58   MachineFunction *MF;
     59   MachineRegisterInfo *RegInfo;
     60   BranchProbabilityInfo *BPI;
     61   /// CanLowerReturn - true iff the function's return value can be lowered to
     62   /// registers.
     63   bool CanLowerReturn;
     64 
     65   /// DemoteRegister - if CanLowerReturn is false, DemoteRegister is a vreg
     66   /// allocated to hold a pointer to the hidden sret parameter.
     67   unsigned DemoteRegister;
     68 
     69   /// MBBMap - A mapping from LLVM basic blocks to their machine code entry.
     70   DenseMap<const BasicBlock*, MachineBasicBlock *> MBBMap;
     71 
     72   /// ValueMap - Since we emit code for the function a basic block at a time,
     73   /// we must remember which virtual registers hold the values for
     74   /// cross-basic-block values.
     75   DenseMap<const Value*, unsigned> ValueMap;
     76 
     77   /// StaticAllocaMap - Keep track of frame indices for fixed sized allocas in
     78   /// the entry block.  This allows the allocas to be efficiently referenced
     79   /// anywhere in the function.
     80   DenseMap<const AllocaInst*, int> StaticAllocaMap;
     81 
     82   /// ByValArgFrameIndexMap - Keep track of frame indices for byval arguments.
     83   DenseMap<const Argument*, int> ByValArgFrameIndexMap;
     84 
     85   /// ArgDbgValues - A list of DBG_VALUE instructions created during isel for
     86   /// function arguments that are inserted after scheduling is completed.
     87   SmallVector<MachineInstr*, 8> ArgDbgValues;
     88 
     89   /// RegFixups - Registers which need to be replaced after isel is done.
     90   DenseMap<unsigned, unsigned> RegFixups;
     91 
     92   /// MBB - The current block.
     93   MachineBasicBlock *MBB;
     94 
     95   /// MBB - The current insert position inside the current block.
     96   MachineBasicBlock::iterator InsertPt;
     97 
     98 #ifndef NDEBUG
     99   SmallPtrSet<const Instruction *, 8> CatchInfoLost;
    100   SmallPtrSet<const Instruction *, 8> CatchInfoFound;
    101 #endif
    102 
    103   struct LiveOutInfo {
    104     unsigned NumSignBits : 31;
    105     bool IsValid : 1;
    106     APInt KnownOne, KnownZero;
    107     LiveOutInfo() : NumSignBits(0), IsValid(true), KnownOne(1, 0),
    108                     KnownZero(1, 0) {}
    109   };
    110 
    111   /// VisitedBBs - The set of basic blocks visited thus far by instruction
    112   /// selection.
    113   SmallPtrSet<const BasicBlock*, 4> VisitedBBs;
    114 
    115   /// PHINodesToUpdate - A list of phi instructions whose operand list will
    116   /// be updated after processing the current basic block.
    117   /// TODO: This isn't per-function state, it's per-basic-block state. But
    118   /// there's no other convenient place for it to live right now.
    119   std::vector<std::pair<MachineInstr*, unsigned> > PHINodesToUpdate;
    120 
    121   explicit FunctionLoweringInfo(const TargetLowering &TLI);
    122 
    123   /// set - Initialize this FunctionLoweringInfo with the given Function
    124   /// and its associated MachineFunction.
    125   ///
    126   void set(const Function &Fn, MachineFunction &MF);
    127 
    128   /// clear - Clear out all the function-specific state. This returns this
    129   /// FunctionLoweringInfo to an empty state, ready to be used for a
    130   /// different function.
    131   void clear();
    132 
    133   /// isExportedInst - Return true if the specified value is an instruction
    134   /// exported from its block.
    135   bool isExportedInst(const Value *V) {
    136     return ValueMap.count(V);
    137   }
    138 
    139   unsigned CreateReg(EVT VT);
    140 
    141   unsigned CreateRegs(Type *Ty);
    142 
    143   unsigned InitializeRegForValue(const Value *V) {
    144     unsigned &R = ValueMap[V];
    145     assert(R == 0 && "Already initialized this value register!");
    146     return R = CreateRegs(V->getType());
    147   }
    148 
    149   /// GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the
    150   /// register is a PHI destination and the PHI's LiveOutInfo is not valid.
    151   const LiveOutInfo *GetLiveOutRegInfo(unsigned Reg) {
    152     if (!LiveOutRegInfo.inBounds(Reg))
    153       return NULL;
    154 
    155     const LiveOutInfo *LOI = &LiveOutRegInfo[Reg];
    156     if (!LOI->IsValid)
    157       return NULL;
    158 
    159     return LOI;
    160   }
    161 
    162   /// GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the
    163   /// register is a PHI destination and the PHI's LiveOutInfo is not valid. If
    164   /// the register's LiveOutInfo is for a smaller bit width, it is extended to
    165   /// the larger bit width by zero extension. The bit width must be no smaller
    166   /// than the LiveOutInfo's existing bit width.
    167   const LiveOutInfo *GetLiveOutRegInfo(unsigned Reg, unsigned BitWidth);
    168 
    169   /// AddLiveOutRegInfo - Adds LiveOutInfo for a register.
    170   void AddLiveOutRegInfo(unsigned Reg, unsigned NumSignBits,
    171                          const APInt &KnownZero, const APInt &KnownOne) {
    172     // Only install this information if it tells us something.
    173     if (NumSignBits == 1 && KnownZero == 0 && KnownOne == 0)
    174       return;
    175 
    176     LiveOutRegInfo.grow(Reg);
    177     LiveOutInfo &LOI = LiveOutRegInfo[Reg];
    178     LOI.NumSignBits = NumSignBits;
    179     LOI.KnownOne = KnownOne;
    180     LOI.KnownZero = KnownZero;
    181   }
    182 
    183   /// ComputePHILiveOutRegInfo - Compute LiveOutInfo for a PHI's destination
    184   /// register based on the LiveOutInfo of its operands.
    185   void ComputePHILiveOutRegInfo(const PHINode*);
    186 
    187   /// InvalidatePHILiveOutRegInfo - Invalidates a PHI's LiveOutInfo, to be
    188   /// called when a block is visited before all of its predecessors.
    189   void InvalidatePHILiveOutRegInfo(const PHINode *PN) {
    190     // PHIs with no uses have no ValueMap entry.
    191     DenseMap<const Value*, unsigned>::const_iterator It = ValueMap.find(PN);
    192     if (It == ValueMap.end())
    193       return;
    194 
    195     unsigned Reg = It->second;
    196     LiveOutRegInfo.grow(Reg);
    197     LiveOutRegInfo[Reg].IsValid = false;
    198   }
    199 
    200   /// setArgumentFrameIndex - Record frame index for the byval
    201   /// argument.
    202   void setArgumentFrameIndex(const Argument *A, int FI);
    203 
    204   /// getArgumentFrameIndex - Get frame index for the byval argument.
    205   int getArgumentFrameIndex(const Argument *A);
    206 
    207 private:
    208   /// LiveOutRegInfo - Information about live out vregs.
    209   IndexedMap<LiveOutInfo, VirtReg2IndexFunctor> LiveOutRegInfo;
    210 };
    211 
    212 /// ComputeUsesVAFloatArgument - Determine if any floating-point values are
    213 /// being passed to this variadic function, and set the MachineModuleInfo's
    214 /// usesVAFloatArgument flag if so. This flag is used to emit an undefined
    215 /// reference to _fltused on Windows, which will link in MSVCRT's
    216 /// floating-point support.
    217 void ComputeUsesVAFloatArgument(const CallInst &I, MachineModuleInfo *MMI);
    218 
    219 /// AddCatchInfo - Extract the personality and type infos from an eh.selector
    220 /// call, and add them to the specified machine basic block.
    221 void AddCatchInfo(const CallInst &I,
    222                   MachineModuleInfo *MMI, MachineBasicBlock *MBB);
    223 
    224 /// AddLandingPadInfo - Extract the exception handling information from the
    225 /// landingpad instruction and add them to the specified machine module info.
    226 void AddLandingPadInfo(const LandingPadInst &I, MachineModuleInfo &MMI,
    227                        MachineBasicBlock *MBB);
    228 
    229 } // end namespace llvm
    230 
    231 #endif
    232