| /external/llvm/lib/CodeGen/ |
| PHIEliminationUtils.cpp | 36 MachineRegisterInfo& MRI = MBB->getParent()->getRegInfo();
37 for (MachineRegisterInfo::reg_iterator RI = MRI.reg_begin(SrcReg),
38 RE = MRI.reg_end(); RI != RE; ++RI) {
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| CriticalAntiDepBreaker.h | 36 MachineRegisterInfo &MRI;
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| RegAllocBase.h | 62 MachineRegisterInfo *MRI;
68 RegAllocBase(): TRI(0), MRI(0), VRM(0), LIS(0), Matrix(0) {}
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| DeadMachineInstructionElim.cpp | 33 const MachineRegisterInfo *MRI;
76 if (!MRI->use_nodbg_empty(Reg))
89 MRI = &MF.getRegInfo();
108 for (MachineRegisterInfo::liveout_iterator LOI = MRI->liveout_begin(),
109 LOE = MRI->liveout_end(); LOI != LOE; ++LOI) {
144 for (MachineRegisterInfo::use_iterator I = MRI->use_begin(Reg),
145 E = MRI->use_end(); I!=E; I=nextI) {
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| LLVMTargetMachine.cpp | 157 const MCRegisterInfo &MRI = *getRegisterInfo();
173 MCE = getTarget().createMCCodeEmitter(*getInstrInfo(), MRI, STI,
192 MCCodeEmitter *MCE = getTarget().createMCCodeEmitter(*getInstrInfo(), MRI,
265 const MCRegisterInfo &MRI = *getRegisterInfo();
267 MCCodeEmitter *MCE = getTarget().createMCCodeEmitter(*getInstrInfo(), MRI,
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| ProcessImplicitDefs.cpp | 30 MachineRegisterInfo *MRI;
84 MRI->use_nodbg_begin(Reg),
85 UE = MRI->use_nodbg_end(); UI != UE; ++UI) {
146 MRI = &MF.getRegInfo();
147 assert(MRI->isSSA() && "ProcessImplicitDefs only works on SSA form.");
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| AggressiveAntiDepBreaker.h | 119 MachineRegisterInfo &MRI;
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| LiveRangeCalc.h | 37 const MachineRegisterInfo *MRI;
127 LiveRangeCalc() : MRI(0), Indexes(0), DomTree(0), Alloc(0) {}
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| LiveRegMatrix.h | 42 MachineRegisterInfo *MRI;
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| OptimizePHIs.cpp | 31 MachineRegisterInfo *MRI;
64 MRI = &Fn.getRegInfo();
102 MachineInstr *SrcMI = MRI->getVRegDef(SrcReg);
109 SrcMI = MRI->getVRegDef(SrcMI->getOperand(1).getReg());
142 for (MachineRegisterInfo::use_iterator I = MRI->use_begin(DstReg),
143 E = MRI->use_end(); I != E; ++I) {
168 if (!MRI->constrainRegClass(SingleValReg, MRI->getRegClass(OldReg)))
171 MRI->replaceRegWith(OldReg, SingleValReg);
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| UnreachableBlockElim.cpp | 200 MachineRegisterInfo &MRI = F.getRegInfo();
201 MRI.constrainRegClass(Input, MRI.getRegClass(Output));
202 MRI.replaceRegWith(Output, Input);
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| CalcSpillWeights.cpp | 47 MachineRegisterInfo &MRI = MF.getRegInfo();
49 for (unsigned i = 0, e = MRI.getNumVirtRegs(); i != e; ++i) {
51 if (MRI.reg_nodbg_empty(Reg))
61 const MachineRegisterInfo &mri) {
79 const TargetRegisterClass *rc = mri.getRegClass(reg);
111 MachineRegisterInfo &mri = MF.getRegInfo(); local
125 bool noHint = mri.getRegAllocationHint(li.reg).first != 0;
130 for (MachineRegisterInfo::reg_iterator I = mri.reg_begin(li.reg);
162 unsigned hint = copyHint(mi, li.reg, tri, mri);
179 mri.setRegAllocationHint(li.reg, 0, hint)
[all...] |
| MachineInstr.cpp | 59 MachineRegisterInfo &MRI = MF->getRegInfo();
60 MRI.removeRegOperandFromUseList(this);
62 MRI.addRegOperandToUseList(this);
97 // MRI may keep uses and defs in different list positions.
101 MachineRegisterInfo &MRI = MF->getRegInfo();
102 MRI.removeRegOperandFromUseList(this);
104 MRI.addRegOperandToUseList(this);
645 void MachineInstr::RemoveRegOperandsFromUseLists(MachineRegisterInfo &MRI) {
648 MRI.removeRegOperandFromUseList(&Operands[i]);
654 void MachineInstr::AddRegOperandsToUseLists(MachineRegisterInfo &MRI) {
[all...] |
| VirtRegMap.cpp | 52 MRI = &mf.getRegInfo();
80 std::pair<unsigned, unsigned> Hint = MRI->getRegAllocationHint(virtReg);
110 for (unsigned i = 0, e = MRI->getNumVirtRegs(); i != e; ++i) {
115 << MRI->getRegClass(Reg)->getName() << "\n";
119 for (unsigned i = 0, e = MRI->getNumVirtRegs(); i != e; ++i) {
123 << "] " << MRI->getRegClass(Reg)->getName() << "\n";
150 MachineRegisterInfo *MRI;
195 MRI = &MF->getRegInfo();
219 MRI->clearVirtRegs();
227 for (unsigned Idx = 0, IdxE = MRI->getNumVirtRegs(); Idx != IdxE; ++Idx)
[all...] |
| VirtRegMap.h | 41 MachineRegisterInfo *MRI;
85 MachineRegisterInfo &getRegInfo() const { return *MRI; }
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| /external/llvm/include/llvm/CodeGen/ |
| MachineSSAUpdater.h | 53 MachineRegisterInfo *MRI;
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| FastISel.h | 52 MachineRegisterInfo &MRI;
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| LiveVariables.h | 113 MachineRegisterInfo &MRI);
138 MachineRegisterInfo* MRI;
290 return getVarInfo(Reg).isLiveIn(MBB, Reg, *MRI);
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| RegisterScavenging.h | 33 MachineRegisterInfo* MRI;
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| LiveRangeEdit.h | 60 MachineRegisterInfo &MRI;
109 MRI(MF.getRegInfo()), LIS(lis), VRM(vrm),
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| RegisterPressure.h | 139 const MachineRegisterInfo *MRI;
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| /external/llvm/include/llvm/MC/ |
| MCInstPrinter.h | 31 const MCRegisterInfo &MRI;
40 const MCRegisterInfo &mri)
41 : CommentStream(0), MAI(mai), MII(mii), MRI(mri), AvailableFeatures(0) {}
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| InstrEmitter.h | 30 MachineRegisterInfo *MRI;
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| /external/llvm/lib/MC/MCDisassembler/ |
| Disassembler.h | 65 llvm::OwningPtr<const llvm::MCRegisterInfo> MRI;
86 const MCRegisterInfo *mRI,
95 MRI.reset(mRI);
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| /frameworks/compile/mclinker/lib/CodeGen/ |
| LLVMTargetMachine.cpp | 270 const MCRegisterInfo &MRI = *getTM().getRegisterInfo();
281 MCE = getTarget().get()->createMCCodeEmitter(MII, MRI, STI, *Context);
315 const MCRegisterInfo &MRI = *getTM().getRegisterInfo();
318 getTarget().get()->createMCCodeEmitter(MII, MRI, STI, *Context);
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