| /external/llvm/lib/CodeGen/ |
| DeadMachineInstructionElim.cpp | 148 MachineInstr *UseMI = Use.getParent();
149 if (UseMI==MI)
152 UseMI->getOperand(0).setReg(0U);
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| OptimizePHIs.cpp | 144 MachineInstr *UseMI = &*I;
145 if (!UseMI->isPHI() || !IsDeadPHICycle(UseMI, PHIsInCycle))
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| LiveRangeEdit.cpp | 155 MachineInstr *DefMI = 0, *UseMI = 0;
169 if (UseMI && UseMI != MI)
174 UseMI = MI;
177 if (!DefMI || !UseMI)
184 LIS.getInstructionIndex(UseMI)))
188 // Assume there are stores between DefMI and UseMI.
194 << " into single use: " << *UseMI);
197 if (UseMI->readsWritesVirtualRegister(LI->reg, &Ops).second)
200 MachineInstr *FoldMI = TII.foldMemoryOperand(UseMI, Ops, DefMI)
[all...] |
| RegisterScavenging.cpp | 256 /// longest after StargMII. UseMI is set to the instruction where the search
264 MachineBasicBlock::iterator &UseMI) {
322 UseMI = RestorePointMI;
351 MachineBasicBlock::iterator UseMI;
352 unsigned SReg = findSurvivorReg(I, Candidates, 25, UseMI);
368 if (!TRI->saveScavengerRegister(*MBB, I, UseMI, RC, SReg)) {
377 TII->loadRegFromStackSlot(*MBB, UseMI, SReg, ScavengingFrameIndex, RC, TRI);
378 II = prior(UseMI);
382 ScavengeRestore = prior(UseMI);
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| MachineSSAUpdater.cpp | 222 MachineInstr *UseMI = U.getParent();
224 if (UseMI->isPHI()) {
225 MachineBasicBlock *SourceBB = findCorrespondingPred(UseMI, &U);
228 NewVR = GetValueInMiddleOfBlock(UseMI->getParent());
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| PeepholeOptimizer.cpp | 190 MachineInstr *UseMI = &*UI;
191 if (UseMI == MI)
194 if (UseMI->isPHI()) {
220 if (UseMI->getOpcode() == TargetOpcode::SUBREG_TO_REG)
223 MachineBasicBlock *UseMBB = UseMI->getParent();
226 if (!LocalMIs.count(UseMI))
266 MachineInstr *UseMI = UseMO->getParent();
267 MachineBasicBlock *UseMBB = UseMI->getParent();
278 MachineInstr *Copy = BuildMI(*UseMBB, UseMI, UseMI->getDebugLoc()
[all...] |
| ScheduleDAGInstrs.cpp | 253 MachineInstr *UseMI = UseSU->getInstr();
263 const MCInstrDesc &UseMCID = UseMI->getDesc();
264 int RegUseIndex = UseMI->findRegisterUseOperandIdx(*Alias);
265 assert(RegUseIndex >= 0 && "UseMI doesn't use register!");
267 (UseMI->mayLoad() || UseMI->mayStore()) &&
279 (UseOp < 0 ? 0 : UseMI), UseOp);
283 (UseOp < 0 ? 0 : UseMI), UseOp,
351 const MachineInstr *UseMI = UseMO->getParent();
352 unsigned UseMOIdx = UseMO - &UseMI->getOperand(0)
[all...] |
| RegAllocFast.cpp | 583 const MachineInstr &UseMI = *MRI->use_nodbg_begin(VirtReg);
585 if (UseMI.isCopyLike())
586 Hint = UseMI.getOperand(0).getReg();
[all...] |
| TailDuplication.cpp | 256 MachineInstr *UseMI = &*UI;
258 if (UseMI->isDebugValue()) {
263 UseMI->eraseFromParent();
266 if (UseMI->getParent() == DefBB && !UseMI->isPHI())
333 MachineInstr *UseMI = &*UI;
334 if (UseMI->isDebugValue())
336 if (UseMI->getParent() != BB)
[all...] |
| MachineLICM.cpp | [all...] |
| RegisterCoalescer.cpp | 599 MachineInstr *UseMI = &*UI;
600 SlotIndex UseIdx = LIS->getInstructionIndex(UseMI);
605 if (UseMI->isRegTiedToDefOperand(UI.getOperandNo()))
644 MachineInstr *UseMI = &*UI;
646 if (UseMI->isDebugValue()) {
652 SlotIndex UseIdx = LIS->getInstructionIndex(UseMI).getRegSlot(true);
662 if (UseMI == CopyMI)
664 if (!UseMI->isCopy())
666 if (UseMI->getOperand(0).getReg() != IntB.reg ||
667 UseMI->getOperand(0).getSubReg()
[all...] |
| TwoAddressInstructionPass.cpp | 421 MachineInstr &UseMI = *MRI->use_nodbg_begin(Reg);
422 if (UseMI.getParent() != MBB)
426 if (isCopyToReg(UseMI, TII, SrcReg, DstReg, IsSrcPhys, IsDstPhys)) {
428 return &UseMI;
431 if (isTwoAddrUse(UseMI, Reg, DstReg)) {
433 return &UseMI;
641 while (MachineInstr *UseMI = findOnlyInterestingUse(Reg, MBB, MRI, TII,IsCopy,
643 if (IsCopy && !Processed.insert(UseMI))
646 DenseMap<MachineInstr*, unsigned>::iterator DI = DistanceMap.find(UseMI);
[all...] |
| /external/llvm/lib/Target/ARM/ |
| MLxExpansionPass.cpp | 121 MachineInstr *UseMI = &*MRI->use_nodbg_begin(Reg);
122 if (UseMI->getParent() != MBB)
125 while (UseMI->isCopy() || UseMI->isInsertSubreg()) {
126 Reg = UseMI->getOperand(0).getReg();
130 UseMI = &*MRI->use_nodbg_begin(Reg);
131 if (UseMI->getParent() != MBB)
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| /external/llvm/lib/Target/PowerPC/ |
| PPCCTRLoops.cpp | 498 MachineInstr *UseMI = Use.getParent();
500 if (MI != UseMI) {
541 MachineInstr *UseMI = Use.getParent();
542 if (UseMI==MI)
546 UseMI->getOperand(0).setReg(0U);
|
