| /external/llvm/lib/Target/ARM/InstPrinter/ |
| ARMInstPrinter.h | 39 void printSORegRegOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
40 void printSORegImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
42 void printAddrModeTBB(const MCInst *MI, unsigned OpNum, raw_ostream &O);
43 void printAddrModeTBH(const MCInst *MI, unsigned OpNum, raw_ostream &O);
44 void printAddrMode2Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
45 void printAM2PostIndexOp(const MCInst *MI, unsigned OpNum, raw_ostream &O);
46 void printAM2PreOrOffsetIndexOp(const MCInst *MI, unsigned OpNum,
48 void printAddrMode2OffsetOperand(const MCInst *MI, unsigned OpNum,
51 void printAddrMode3Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
52 void printAddrMode3OffsetOperand(const MCInst *MI, unsigned OpNum,
[all...] |
| ARMInstPrinter.cpp | 247 void ARMInstPrinter::printT2LdrLabelOperand(const MCInst *MI, unsigned OpNum,
249 const MCOperand &MO1 = MI->getOperand(OpNum);
263 void ARMInstPrinter::printSORegRegOperand(const MCInst *MI, unsigned OpNum,
265 const MCOperand &MO1 = MI->getOperand(OpNum);
266 const MCOperand &MO2 = MI->getOperand(OpNum+1);
267 const MCOperand &MO3 = MI->getOperand(OpNum+2);
281 void ARMInstPrinter::printSORegImmOperand(const MCInst *MI, unsigned OpNum,
283 const MCOperand &MO1 = MI->getOperand(OpNum);
284 const MCOperand &MO2 = MI->getOperand(OpNum+1);
390 unsigned OpNum,
[all...] |
| /external/llvm/lib/Target/ |
| TargetInstrInfo.cpp | 34 TargetInstrInfo::getRegClass(const MCInstrDesc &MCID, unsigned OpNum,
37 if (OpNum >= MCID.getNumOperands())
40 short RegClass = MCID.OpInfo[OpNum].RegClass;
41 if (MCID.OpInfo[OpNum].isLookupPtrRegClass())
|
| /external/llvm/lib/Target/MSP430/ |
| MSP430AsmPrinter.cpp | 49 void printOperand(const MachineInstr *MI, int OpNum,
51 void printSrcMemOperand(const MachineInstr *MI, int OpNum,
64 void MSP430AsmPrinter::printOperand(const MachineInstr *MI, int OpNum,
66 const MachineOperand &MO = MI->getOperand(OpNum);
111 void MSP430AsmPrinter::printSrcMemOperand(const MachineInstr *MI, int OpNum,
113 const MachineOperand &Base = MI->getOperand(OpNum);
114 const MachineOperand &Disp = MI->getOperand(OpNum+1);
121 printOperand(MI, OpNum+1, O, "nohash");
126 printOperand(MI, OpNum, O);
|
| /external/llvm/lib/Target/ARM/ |
| ARMAsmPrinter.h | 60 void printOperand(const MachineInstr *MI, int OpNum, raw_ostream &O,
63 virtual bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
66 virtual bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum,
|
| ARMAsmPrinter.cpp | 330 void ARMAsmPrinter::printOperand(const MachineInstr *MI, int OpNum,
332 const MachineOperand &MO = MI->getOperand(OpNum);
417 bool ARMAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
427 return AsmPrinter::PrintAsmOperand(MI, OpNum, AsmVariant, ExtraCode, O);
429 if (MI->getOperand(OpNum).isReg()) {
431 << ARMInstPrinter::getRegisterName(MI->getOperand(OpNum).getReg())
437 if (!MI->getOperand(OpNum).isImm())
439 O << MI->getOperand(OpNum).getImm();
443 printOperand(MI, OpNum, O);
446 if (MI->getOperand(OpNum).isReg())
[all...] |
| Thumb2SizeReduction.cpp | 338 unsigned OpNum = 3; // First 'rest' of operands.
376 OpNum = 4;
397 OpNum = 0;
406 OpNum = 2;
414 OpNum = 0;
421 OpNum = 2;
471 for (unsigned e = MI->getNumOperands(); OpNum != e; ++OpNum)
472 MIB.addOperand(MI->getOperand(OpNum));
[all...] |
| ARMLoadStoreOptimizer.cpp | 783 for (unsigned OpNum = 3, e = MI->getNumOperands(); OpNum != e; ++OpNum)
784 MIB.addOperand(MI->getOperand(OpNum));
[all...] |
| ARMISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsAsmPrinter.cpp | 312 bool MipsAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
319 const MachineOperand &MO = MI->getOperand(OpNum);
323 return AsmPrinter::PrintAsmOperand(MI,OpNum,AsmVariant,ExtraCode,O);
359 if (OpNum == 0)
361 const MachineOperand &FlagsOP = MI->getOperand(OpNum - 1);
377 unsigned RegOp = OpNum;
383 RegOp = (Subtarget->isLittle()) ? OpNum + 1 : OpNum;
386 RegOp = (Subtarget->isLittle()) ? OpNum : OpNum + 1
[all...] |
| MipsAsmPrinter.h | 65 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum,
68 void printOperand(const MachineInstr *MI, int opNum, raw_ostream &O);
69 void printUnsignedImm(const MachineInstr *MI, int opNum, raw_ostream &O);
70 void printMemOperand(const MachineInstr *MI, int opNum, raw_ostream &O);
71 void printMemOperandEA(const MachineInstr *MI, int opNum, raw_ostream &O);
72 void printFCCOperand(const MachineInstr *MI, int opNum, raw_ostream &O,
|
| /external/llvm/lib/Bitcode/Reader/ |
| BitcodeReader.cpp | [all...] |
| /frameworks/compile/libbcc/bcinfo/BitReader_3_0/ |
| BitcodeReader.cpp | [all...] |
| /frameworks/compile/libbcc/bcinfo/BitReader_2_7/ |
| BitcodeReader.cpp | [all...] |
| /external/llvm/include/llvm/MC/ |
| MCInstrDesc.h | 149 int getOperandConstraint(unsigned OpNum,
151 if (OpNum < NumOperands &&
152 (OpInfo[OpNum].Constraints & (1 << Constraint))) {
154 return (int)(OpInfo[OpNum].Constraints >> Pos) & 0xf;
|
| /external/llvm/utils/PerfectShuffle/ |
| PerfectShuffle.cpp | 106 unsigned short OpNum;
110 Operator(unsigned short shufflemask, const char *name, unsigned opnum,
112 : ShuffleMask(shufflemask), OpNum(opnum), Name(name), Cost(cost) {
303 for (unsigned opnum = 0, e = TheOperators.size(); opnum != e; ++opnum) {
304 Operator *Op = TheOperators[opnum];
394 unsigned OpNum = ShufTab[i].Op ? ShufTab[i].Op->OpNum : 0
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86InstrInfo.h | 357 unsigned getPartialRegUpdateClearance(const MachineInstr *MI, unsigned OpNum,
359 void breakPartialRegDependency(MachineBasicBlock::iterator MI, unsigned OpNum,
364 unsigned OpNum,
|
| X86CodeEmitter.cpp | 760 unsigned OpNum) {
761 unsigned SrcReg = MI.getOperand(OpNum).getReg();
762 unsigned SrcRegNum = X86_MC::getX86RegNum(MI.getOperand(OpNum).getReg());
[all...] |
| X86InstrInfo.cpp | [all...] |
| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| ARMMCCodeEmitter.cpp | 264 unsigned getT2AddrModeSORegOpValue(const MCInst &MI, unsigned OpNum,
266 unsigned getT2AddrModeImm8OpValue(const MCInst &MI, unsigned OpNum,
268 unsigned getT2AddrModeImm8OffsetOpValue(const MCInst &MI, unsigned OpNum,
270 unsigned getT2AddrModeImm12OffsetOpValue(const MCInst &MI, unsigned OpNum,
[all...] |
| /external/llvm/lib/CodeGen/ |
| RegAllocFast.cpp | 74 unsigned short LastOpNum; // OpNum on LastUse.
172 LiveRegMap::iterator defineVirtReg(MachineInstr *MI, unsigned OpNum,
174 LiveRegMap::iterator reloadVirtReg(MachineInstr *MI, unsigned OpNum,
177 bool setPhysReg(MachineInstr *MI, unsigned OpNum, unsigned PhysReg);
572 RAFast::defineVirtReg(MachineInstr *MI, unsigned OpNum,
597 LRI->LastOpNum = OpNum;
605 RAFast::reloadVirtReg(MachineInstr *MI, unsigned OpNum,
612 MachineOperand &MO = MI->getOperand(OpNum);
648 LRI->LastOpNum = OpNum;
653 // setPhysReg - Change operand OpNum in MI the refer the PhysReg, considerin
[all...] |
| /external/llvm/include/llvm/Target/ |
| TargetInstrInfo.h | 59 /// class constraint for OpNum, or NULL.
61 unsigned OpNum,
[all...] |
| /external/clang/lib/Sema/ |
| SemaStmtAsm.cpp | 663 unsigned OpNum = 0;
664 for (unsigned i = 0, e = OutputExprNames.size(); i != e; ++i, ++OpNum) {
668 OS << '$' << OpNum;
671 for (unsigned i = 0, e = InputExprNames.size(); i != e; ++i, ++OpNum) {
675 OS << '$' << OpNum;
|
| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| X86MCCodeEmitter.cpp | 68 unsigned OpNum) {
69 unsigned SrcReg = MI.getOperand(OpNum).getReg();
70 unsigned SrcRegNum = GetX86RegNum(MI.getOperand(OpNum));
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | [all...] |
