/dalvik/vm/compiler/codegen/x86/libenc/ |
enc_tabl.cpp | 109 {OpcodeInfo::em64t, {REX_W, 0xFF, _1}, {r_m64}, DU }, 352 {OpcodeInfo::decoder64, {REX_W, opcode_starts_from+5, id}, {RAX, imm32s},DU_U },\ 357 {OpcodeInfo::em64t, {REX_W, 0x81, opc_ext, id}, {r_m64, imm32s}, def_use },\ 361 {OpcodeInfo::em64t, {REX_W, 0x83, opc_ext, ib}, {r_m64, imm8s}, def_use },\ 367 {OpcodeInfo::em64t, {REX_W, opcode_starts_from+1, _r}, {r_m64, r64}, def_use },\ 373 {OpcodeInfo::em64t, {REX_W, opcode_starts_from+3, _r}, {r64, r_m64}, def_use }, 430 {OpcodeInfo::em64t, {REX_W, 0x0F, 0xB1, _r}, {r_m64, r64, RAX}, DU_DU_DU }, 490 {OpcodeInfo::em64t, {REX_W, 0x99}, {RDX, RAX}, D_U }, 499 {OpcodeInfo::em64t, {REX_W, 0x0F, 0x40 + ConditionMnemonic_##cc, _r}, {r64, r_m64}, DU_U }, \ 537 {OpcodeInfo::em64t, {REX_W, 0xF2, 0x0F, 0x2D, _r}, {r64, xmm_m64}, D_U } [all...] |
enc_prvt.h | 246 #define REX_W OpcodeByteKind_REX_W
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/external/qemu/ |
i386-dis.c | 130 #define REX_W 8 [all...] |
/external/llvm/lib/Target/X86/MCTargetDesc/ |
X86BaseInfo.h | 357 // REX_W - REX prefixes are instruction prefixes used in 64-bit mode. 363 REX_W = 1 << REXShift, 437 /// way as REX_W is for regular SSE instructions.
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X86MCCodeEmitter.cpp | 730 if (TSFlags & X86II::REX_W) [all...] |
/external/llvm/lib/Target/X86/ |
X86CodeEmitter.cpp | 166 if (Desc.TSFlags & X86II::REX_W) [all...] |