| /external/llvm/lib/CodeGen/ |
| LiveDebugVariables.h | 40 /// renameRegister - Move any user variables in OldReg to NewReg:SubIdx.
43 /// @param SubIdx If NewReg is a virtual register, SubIdx may indicate a sub-
45 void renameRegister(unsigned OldReg, unsigned NewReg, unsigned SubIdx);
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| PeepholeOptimizer.cpp | 144 unsigned SrcReg, DstReg, SubIdx;
145 if (!TII->isCoalescableExtInstr(*MI, SrcReg, DstReg, SubIdx))
159 DstRC = TM->getRegisterInfo()->getSubClassWithSubReg(DstRC, SubIdx);
166 // If UseSrcSubIdx is Set, SubIdx also applies to SrcReg, and only uses of
167 // SrcReg:SubIdx should be replaced.
169 getSubClassWithSubReg(MRI->getRegClass(SrcReg), SubIdx) != 0;
199 // Only accept uses of SrcReg:SubIdx.
200 if (UseSrcSubIdx && UseMO.getSubReg() != SubIdx)
280 .addReg(DstReg, 0, SubIdx);
281 // SubIdx applies to both SrcReg and DstReg when UseSrcSubIdx is set
[all...] |
| ExpandPostRAPseudos.cpp | 104 assert(!MI->getOperand(2).getSubReg() && "SubIdx on physreg?");
105 unsigned SubIdx = MI->getOperand(3).getImm();
107 assert(SubIdx != 0 && "Invalid index for insert_subreg");
108 unsigned DstSubReg = TRI->getSubReg(DstReg, SubIdx);
124 MI->RemoveOperand(3); // SubIdx
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| MachineCopyPropagation.cpp | 117 unsigned SubIdx = TRI->getSubRegIndex(SrcSrc, Def);
118 if (!SubIdx)
120 return SubIdx == TRI->getSubRegIndex(SrcDef, Src);
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| MachineRegisterInfo.cpp | 80 if (unsigned SubIdx = I.getOperand().getSubReg()) {
82 NewRC = TRI->getMatchingSuperRegClass(NewRC, OpRC, SubIdx);
84 NewRC = TRI->getSubClassWithSubReg(NewRC, SubIdx);
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| LiveDebugVariables.cpp | 250 /// renameRegister - Update locations to rewrite OldReg as NewReg:SubIdx.
251 void renameRegister(unsigned OldReg, unsigned NewReg, unsigned SubIdx,
337 /// renameRegister - Replace all references to OldReg with NewReg:SubIdx.
338 void renameRegister(unsigned OldReg, unsigned NewReg, unsigned SubIdx);
718 renameRegister(unsigned OldReg, unsigned NewReg, unsigned SubIdx,
728 Loc.substVirtReg(NewReg, SubIdx, *TRI);
734 renameRegister(unsigned OldReg, unsigned NewReg, unsigned SubIdx) {
745 UV->renameRegister(OldReg, NewReg, SubIdx, TRI);
751 renameRegister(unsigned OldReg, unsigned NewReg, unsigned SubIdx) {
753 static_cast<LDVImpl*>(pImpl)->renameRegister(OldReg, NewReg, SubIdx);
[all...] |
| MachineInstr.cpp | 70 void MachineOperand::substVirtReg(unsigned Reg, unsigned SubIdx,
73 if (SubIdx && getSubReg())
74 SubIdx = TRI.composeSubRegIndices(SubIdx, getSubReg());
76 if (SubIdx)
77 setSubReg(SubIdx);
[all...] |
| TwoAddressInstructionPass.cpp | [all...] |
| MachineVerifier.cpp | 867 unsigned SubIdx = MO->getSubReg();
870 if (SubIdx) {
885 if (SubIdx) {
887 TRI->getSubClassWithSubReg(RC, SubIdx);
891 << " does not support subreg index " << SubIdx << "\n";
[all...] |
| RegisterCoalescer.cpp | 159 void updateRegDefsUses(unsigned SrcReg, unsigned DstReg, unsigned SubIdx);
304 "Cannot have a physical SubIdx");
845 unsigned SubIdx) {
850 LDV->renameRegister(SrcReg, DstReg, SubIdx);
860 if (DstInt && !Reads && SubIdx)
870 if (SubIdx && MO.isDef())
876 MO.substVirtReg(DstReg, SubIdx, *TRI);
[all...] |
| /external/llvm/lib/Target/ARM/ |
| Thumb2RegisterInfo.h | 35 unsigned DestReg, unsigned SubIdx, int Val,
|
| Thumb2RegisterInfo.cpp | 38 unsigned DestReg, unsigned SubIdx,
49 .addReg(DestReg, getDefRegState(true), SubIdx)
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| Thumb1RegisterInfo.h | 41 unsigned DestReg, unsigned SubIdx, int Val,
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| ARMBaseRegisterInfo.h | 166 unsigned DestReg, unsigned SubIdx,
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| /external/llvm/lib/MC/ |
| MCRegisterInfo.cpp | 18 unsigned MCRegisterInfo::getMatchingSuperReg(unsigned Reg, unsigned SubIdx,
21 if (RC->contains(*Supers) && Reg == getSubReg(*Supers, SubIdx))
|
| /external/llvm/include/llvm/Target/ |
| TargetRegisterInfo.h | 329 const char *getSubRegIndexName(unsigned SubIdx) const {
330 assert(SubIdx && "This is not a subregister index");
331 return SubRegIndexNames[SubIdx-1];
413 /// Reg so its sub-register of index SubIdx is Reg.
414 unsigned getMatchingSuperReg(unsigned Reg, unsigned SubIdx,
416 return MCRegisterInfo::getMatchingSuperReg(Reg, SubIdx, RC->MC);
[all...] |
| TargetInstrInfo.h | 112 /// SubIdx.
115 unsigned &SubIdx) const {
183 /// DestReg:SubIdx. Any existing subreg index is preserved or composed with
184 /// SubIdx.
187 unsigned DestReg, unsigned SubIdx,
[all...] |
| /external/llvm/utils/TableGen/ |
| CodeGenRegisters.h | 302 // registers have a SubIdx sub-register.
304 getSubClassWithSubReg(CodeGenSubRegIndex *SubIdx) const {
305 return SubClassWithSubReg.lookup(SubIdx);
308 void setSubClassWithSubReg(CodeGenSubRegIndex *SubIdx,
310 SubClassWithSubReg[SubIdx] = SubRC;
314 // containing only SubIdx super-registers of this class.
315 void getSuperRegClasses(CodeGenSubRegIndex *SubIdx, BitVector &Out) const;
318 void addSuperRegClass(CodeGenSubRegIndex *SubIdx,
320 SuperRegClasses[SubIdx].insert(SuperRC);
|
| CodeGenRegisters.cpp | 461 CodeGenSubRegIndex *SubIdx = getSubRegIndex(SI->second);
462 if (!SubIdx)
465 NewIdx->addComposite(SI->first, SubIdx);
487 // Topological signature computed from SubIdx, TopoId(SubReg).
[all...] |
| /external/llvm/lib/Target/ |
| TargetRegisterInfo.cpp | 41 if (SubIdx) {
43 OS << ':' << TRI->getSubRegIndexName(SubIdx);
45 OS << ":sub(" << SubIdx << ')';
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| InstrEmitter.cpp | 429 unsigned InstrEmitter::ConstrainForSubReg(unsigned VReg, unsigned SubIdx,
432 const TargetRegisterClass *RC = TRI->getSubClassWithSubReg(VRC, SubIdx);
434 // RC is a sub-class of VRC that supports SubIdx. Try to constrain VReg
439 // VReg has been adjusted. It can be used with SubIdx operands now.
445 RC = TRI->getSubClassWithSubReg(TLI->getRegClassFor(VT), SubIdx);
446 assert(RC && "No legal register class for VT supports that SubIdx");
480 unsigned SubIdx = cast<ConstantSDNode>(Node->getOperand(1))->getZExtValue();
488 SubIdx == DefSubIdx &&
500 // VReg may not support a SubIdx sub-register, and we may need to
503 VReg = ConstrainForSubReg(VReg, SubIdx,
[all...] |
| InstrEmitter.h | 81 /// supports SubIdx sub-registers. Emit a copy if that isn't possible.
83 unsigned ConstrainForSubReg(unsigned VReg, unsigned SubIdx,
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCInstrInfo.h | 97 unsigned &SubIdx) const;
|
| /external/llvm/lib/Target/X86/ |
| X86InstrInfo.h | 166 /// SubIdx.
169 unsigned &SubIdx) const;
188 unsigned DestReg, unsigned SubIdx,
|
| /external/llvm/include/llvm/MC/ |
| MCRegisterInfo.h | 315 /// Reg so its sub-register of index SubIdx is Reg.
316 unsigned getMatchingSuperReg(unsigned Reg, unsigned SubIdx,
|
