| /external/llvm/lib/CodeGen/ |
| LiveRangeEdit.cpp | 155 MachineInstr *DefMI = 0, *UseMI = 0;
169 if (UseMI && UseMI != MI)
174 UseMI = MI;
177 if (!DefMI || !UseMI)
184 LIS.getInstructionIndex(UseMI)))
188 // Assume there are stores between DefMI and UseMI.
194 << " into single use: " << *UseMI);
197 if (UseMI->readsWritesVirtualRegister(LI->reg, &Ops).second)
200 MachineInstr *FoldMI = TII.foldMemoryOperand(UseMI, Ops, DefMI)
[all...] |
| RegisterScavenging.cpp | 256 /// longest after StargMII. UseMI is set to the instruction where the search
264 MachineBasicBlock::iterator &UseMI) {
322 UseMI = RestorePointMI;
351 MachineBasicBlock::iterator UseMI;
352 unsigned SReg = findSurvivorReg(I, Candidates, 25, UseMI);
368 if (!TRI->saveScavengerRegister(*MBB, I, UseMI, RC, SReg)) {
377 TII->loadRegFromStackSlot(*MBB, UseMI, SReg, ScavengingFrameIndex, RC, TRI);
378 II = prior(UseMI);
382 ScavengeRestore = prior(UseMI);
|
| PeepholeOptimizer.cpp | 190 MachineInstr *UseMI = &*UI;
191 if (UseMI == MI)
194 if (UseMI->isPHI()) {
220 if (UseMI->getOpcode() == TargetOpcode::SUBREG_TO_REG)
223 MachineBasicBlock *UseMBB = UseMI->getParent();
226 if (!LocalMIs.count(UseMI))
266 MachineInstr *UseMI = UseMO->getParent();
267 MachineBasicBlock *UseMBB = UseMI->getParent();
278 MachineInstr *Copy = BuildMI(*UseMBB, UseMI, UseMI->getDebugLoc()
[all...] |
| DeadMachineInstructionElim.cpp | 148 MachineInstr *UseMI = Use.getParent();
149 if (UseMI==MI)
152 UseMI->getOperand(0).setReg(0U);
|
| OptimizePHIs.cpp | 144 MachineInstr *UseMI = &*I;
145 if (!UseMI->isPHI() || !IsDeadPHICycle(UseMI, PHIsInCycle))
|
| MachineTraceMetrics.cpp | 541 // Get the input data dependencies that must be ready before UseMI can issue.
542 // Return true if UseMI has any physreg operands.
543 static bool getDataDeps(const MachineInstr *UseMI,
547 for (ConstMIOperands MO(UseMI); MO.isValid(); ++MO) {
567 static void getPHIDeps(const MachineInstr *UseMI,
574 assert(UseMI->isPHI() && UseMI->getNumOperands() % 2 && "Bad PHI");
575 for (unsigned i = 1; i != UseMI->getNumOperands(); i += 2) {
576 if (UseMI->getOperand(i + 1).getMBB() == Pred) {
577 unsigned Reg = UseMI->getOperand(i).getReg()
[all...] |
| TwoAddressInstructionPass.cpp | 421 MachineInstr &UseMI = *MRI->use_nodbg_begin(Reg);
422 if (UseMI.getParent() != MBB)
426 if (isCopyToReg(UseMI, TII, SrcReg, DstReg, IsSrcPhys, IsDstPhys)) {
428 return &UseMI;
431 if (isTwoAddrUse(UseMI, Reg, DstReg)) {
433 return &UseMI;
641 while (MachineInstr *UseMI = findOnlyInterestingUse(Reg, MBB, MRI, TII,IsCopy,
643 if (IsCopy && !Processed.insert(UseMI))
646 DenseMap<MachineInstr*, unsigned>::iterator DI = DistanceMap.find(UseMI);
[all...] |
| MachineSSAUpdater.cpp | 222 MachineInstr *UseMI = U.getParent();
224 if (UseMI->isPHI()) {
225 MachineBasicBlock *SourceBB = findCorrespondingPred(UseMI, &U);
228 NewVR = GetValueInMiddleOfBlock(UseMI->getParent());
|
| RegisterCoalescer.cpp | 599 MachineInstr *UseMI = &*UI;
600 SlotIndex UseIdx = LIS->getInstructionIndex(UseMI);
605 if (UseMI->isRegTiedToDefOperand(UI.getOperandNo()))
644 MachineInstr *UseMI = &*UI;
646 if (UseMI->isDebugValue()) {
652 SlotIndex UseIdx = LIS->getInstructionIndex(UseMI).getRegSlot(true);
662 if (UseMI == CopyMI)
664 if (!UseMI->isCopy())
666 if (UseMI->getOperand(0).getReg() != IntB.reg ||
667 UseMI->getOperand(0).getSubReg()
[all...] |
| ScheduleDAGInstrs.cpp | 253 MachineInstr *UseMI = UseSU->getInstr();
263 const MCInstrDesc &UseMCID = UseMI->getDesc();
264 int RegUseIndex = UseMI->findRegisterUseOperandIdx(*Alias);
265 assert(RegUseIndex >= 0 && "UseMI doesn't use register!");
267 (UseMI->mayLoad() || UseMI->mayStore()) &&
279 (UseOp < 0 ? 0 : UseMI), UseOp);
283 (UseOp < 0 ? 0 : UseMI), UseOp,
351 const MachineInstr *UseMI = UseMO->getParent();
352 unsigned UseMOIdx = UseMO - &UseMI->getOperand(0)
[all...] |
| MachineLICM.cpp | [all...] |
| TailDuplication.cpp | 256 MachineInstr *UseMI = &*UI;
258 if (UseMI->isDebugValue()) {
263 UseMI->eraseFromParent();
266 if (UseMI->getParent() == DefBB && !UseMI->isPHI())
333 MachineInstr *UseMI = &*UI;
334 if (UseMI->isDebugValue())
336 if (UseMI->getParent() != BB)
[all...] |
| TargetInstrInfoImpl.cpp | 596 /// Both DefMI and UseMI must be valid. By default, call directly to the
601 const MachineInstr *UseMI, unsigned UseIdx) const {
603 unsigned UseClass = UseMI->getDesc().getSchedClass();
639 /// dependent def and use when the operand indices are already known. UseMI may
652 const MachineInstr *UseMI, unsigned UseIdx,
662 if (UseMI)
663 OperLatency = getOperandLatency(ItinData, DefMI, DefIdx, UseMI, UseIdx);
|
| InlineSpiller.cpp | 235 MachineInstr *UseMI = 0;
256 if (UseMI && MI != UseMI)
258 UseMI = MI;
[all...] |
| LiveIntervalAnalysis.cpp | 619 MachineInstr *UseMI = I.skipInstruction();) {
620 if (UseMI->isDebugValue() || !UseMI->readsVirtualRegister(li->reg))
622 SlotIndex Idx = getInstructionIndex(UseMI).getRegSlot();
629 DEBUG(dbgs() << Idx << '\t' << *UseMI
[all...] |
| /external/llvm/lib/Target/ARM/ |
| MLxExpansionPass.cpp | 121 MachineInstr *UseMI = &*MRI->use_nodbg_begin(Reg);
122 if (UseMI->getParent() != MBB)
125 while (UseMI->isCopy() || UseMI->isInsertSubreg()) {
126 Reg = UseMI->getOperand(0).getReg();
130 UseMI = &*MRI->use_nodbg_begin(Reg);
131 if (UseMI->getParent() != MBB)
|
| Thumb1RegisterInfo.h | 61 MachineBasicBlock::iterator &UseMI,
|
| ARMBaseInstrInfo.h | 214 virtual bool FoldImmediate(MachineInstr *UseMI, MachineInstr *DefMI,
223 const MachineInstr *UseMI, unsigned UseIdx) const;
273 const MachineInstr *UseMI, unsigned UseIdx) const;
|
| ARMBaseInstrInfo.cpp | [all...] |
| Thumb1RegisterInfo.cpp | 551 MachineBasicBlock::iterator &UseMI,
564 // The UseMI is where we would like to restore the register. If there's
566 // before that instead and adjust the UseMI.
568 for (MachineBasicBlock::iterator II = I; !done && II != UseMI ; ++II) {
575 UseMI = II;
583 UseMI = II;
590 AddDefaultPred(BuildMI(MBB, UseMI, DL, TII.get(ARM::tMOVr)).
|
| /external/llvm/include/llvm/CodeGen/ |
| RegisterScavenging.h | 157 /// longest after StartMI. UseMI is set to the instruction where the search
164 MachineBasicBlock::iterator &UseMI);
|
| /external/llvm/include/llvm/Target/ |
| TargetInstrInfo.h | [all...] |
| TargetRegisterInfo.h | 740 MachineBasicBlock::iterator &UseMI,
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCCTRLoops.cpp | 498 MachineInstr *UseMI = Use.getParent();
500 if (MI != UseMI) {
541 MachineInstr *UseMI = Use.getParent();
542 if (UseMI==MI)
546 UseMI->getOperand(0).setReg(0U);
|
| /external/llvm/lib/Target/X86/ |
| X86InstrInfo.h | 373 const MachineInstr *UseMI, unsigned UseIdx) const;
|
