| /external/clang/test/Preprocessor/ |
| macro_paste_bad.c | 32 #define VA __VA_ ## ARGS__
33 int VA; // expected-warning {{__VA_ARGS__ can only appear in the expansion of a C99 variadic macro}}
|
| /external/clang/test/Parser/ |
| cxx-using-declaration.cpp | 4 int VA;
9 using A::VA;
15 VA = 1;
|
| /external/clang/test/CXX/special/class.dtor/ |
| p3-0x.cpp | 140 struct VA {
142 virtual ~VA() {}
145 struct VB : VA
149 struct TVB : VA
|
| /external/webkit/Source/WebKit/android/content/ |
| address_detector.cpp | 722 VA = 52, // VA Virginia
753 DC, VA, DC, DC, DC, DC, MD, MD, MD, MD, // 200-209
755 VA, VA, VA, VA, VA, VA, VA, VA, VA, VA, // 220-22
[all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | 110 CCValAssign &VA = RVLocs[i];
111 assert(VA.isRegLoc() && "Can only return in registers!");
113 Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(),
169 CCValAssign &VA = ArgLocs[i];
182 if (VA.isRegLoc()) {
183 if (VA.needsCustom()) {
184 assert(VA.getLocVT() == MVT::f64);
186 MF.getRegInfo().addLiveIn(VA.getLocReg(), VRegHi);
212 MF.getRegInfo().addLiveIn(VA.getLocReg(), VReg);
214 if (VA.getLocVT() == MVT::f32
[all...] |
| /external/llvm/lib/Target/MBlaze/ |
| MBlazeISelLowering.cpp | 727 CCValAssign &VA = ArgLocs[i];
728 MVT RegVT = VA.getLocVT();
732 switch (VA.getLocInfo()) {
748 if (VA.isRegLoc()) {
749 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
752 assert(VA.isMemLoc());
760 unsigned ArgSize = VA.getValVT().getSizeInBits()/8;
761 unsigned StackLoc = VA.getLocMemOffset() + 4;
[all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.cpp | 324 CCValAssign &VA = ArgLocs[i];
325 if (VA.isRegLoc()) {
327 EVT RegVT = VA.getLocVT();
339 RegInfo.addLiveIn(VA.getLocReg(), VReg);
345 if (VA.getLocInfo() == CCValAssign::SExt)
347 DAG.getValueType(VA.getValVT()));
348 else if (VA.getLocInfo() == CCValAssign::ZExt)
350 DAG.getValueType(VA.getValVT()));
352 if (VA.getLocInfo() != CCValAssign::Full)
353 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue)
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86FastISel.cpp | 760 CCValAssign &VA = ValLocs[0];
763 if (VA.getLocInfo() != CCValAssign::Full)
766 if (!VA.isRegLoc())
771 if (VA.getLocReg() == X86::ST0 || VA.getLocReg() == X86::ST1)
774 unsigned SrcReg = Reg + VA.getValNo();
776 EVT DstVT = VA.getValVT();
800 unsigned DstReg = VA.getLocReg();
809 MRI.addLiveOut(VA.getLocReg());
[all...] |
| X86ISelLowering.cpp | [all...] |
| X86ISelLowering.h | 730 const CCValAssign &VA, MachineFrameInfo *MFI,
734 const CCValAssign &VA,
[all...] |
| /external/qemu/ |
| ppc-dis.c | 820 /* The VA field in a VA, VX or VXR form instruction. */
821 #define VA UI + 1
824 /* The VB field in a VA, VX or VXR form instruction. */
825 #define VB VA + 1
828 /* The VC field in a VA form instruction. */
832 /* The VD or VS field in a VA, VX, VXR or X form instruction. */
846 /* The SHB field in a VA form instruction. */
[all...] |
| /external/mksh/src/ |
| shf.c | 771 #define VA(type) va_arg(args, type)
820 tmp = VA(int);
877 lnum = (long)VA(ssize_t);
879 lnum = VA(long);
881 lnum = (long)(short)VA(int);
883 lnum = (long)VA(int);
890 lnum = VA(size_t);
892 lnum = VA(unsigned long);
894 lnum = (unsigned long)(unsigned short)VA(int);
896 lnum = (unsigned long)VA(unsigned int)
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.cpp | 318 CCValAssign &VA = RVLocs[i];
320 Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), OutVals[i], Flag);
425 CCValAssign &VA = ArgLocs[i];
426 if (VA.isMemLoc()) {
449 CCValAssign &VA = ArgLocs[i];
454 switch (VA.getLocInfo()) {
461 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg);
464 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg);
467 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg);
471 if (VA.isMemLoc())
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMFastISel.cpp | [all...] |
| ARMISelLowering.h | 410 CCValAssign &VA, CCValAssign &NextVA,
414 SDValue GetF64FormalArgument(CCValAssign &VA, CCValAssign &NextVA,
422 const CCValAssign &VA,
|
| ARMISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | [all...] |
| /external/mesa3d/docs/OLD/ |
| MESA_trace.spec | 12 Brian Paul, VA Linux Systems, Inc., brianp 'at' valinux.com
|
| MESA_packed_depth_stencil.spec | 11 Keith Whitwell, VA Linux Systems Inc. (keithw 'at' valinux.com)
12 Brian Paul, VA Linux Systems Inc. (brianp 'at' valinux.com)
|
| MESA_sprite_point.spec | 11 Brian Paul, VA Linux Systems Inc. (brianp 'at' valinux.com)
|
| /external/clang/lib/Analysis/ |
| LiveVariables.cpp | 298 for (const VariableArrayType* VA = FindVA(VD->getType());
299 VA != 0; VA = FindVA(VA->getElementType())) {
300 AddLiveStmt(val.liveStmts, LV.SSetFact, VA->getSizeExpr());
|
| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.cpp | [all...] |
| /external/icu4c/ |
| runConfigureICU | 44 Linux/VA Use the IBM Visual Age compiler on Power PC Linux
219 Linux/VA)
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/CellSPU/ |
| SPUISelLowering.cpp | [all...] |
