| /external/llvm/lib/Target/ARM/ |
| ARMInstrInfo.cpp | 35 NopInst.addOperand(MCOperand::CreateImm(0));
36 NopInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
37 NopInst.addOperand(MCOperand::CreateReg(0));
40 NopInst.addOperand(MCOperand::CreateReg(ARM::R0));
41 NopInst.addOperand(MCOperand::CreateReg(ARM::R0));
42 NopInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
43 NopInst.addOperand(MCOperand::CreateReg(0));
44 NopInst.addOperand(MCOperand::CreateReg(0));
|
| ARMAsmPrinter.cpp | [all...] |
| Thumb1InstrInfo.cpp | 31 NopInst.addOperand(MCOperand::CreateReg(ARM::R8));
32 NopInst.addOperand(MCOperand::CreateReg(ARM::R8));
33 NopInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
34 NopInst.addOperand(MCOperand::CreateReg(0));
|
| ARMExpandPseudoInsts.cpp | 81 UseMI.addOperand(MO);
83 DefMI.addOperand(MO);
400 MIB.addOperand(MI.getOperand(OpIdx++));
403 MIB.addOperand(MI.getOperand(OpIdx++));
404 MIB.addOperand(MI.getOperand(OpIdx++));
407 MIB.addOperand(MI.getOperand(OpIdx++));
417 MIB.addOperand(MI.getOperand(OpIdx++));
418 MIB.addOperand(MI.getOperand(OpIdx++));
425 MIB.addOperand(MO);
452 MIB.addOperand(MI.getOperand(OpIdx++))
[all...] |
| ARMMCInstLower.cpp | 123 OutMI.addOperand(MCOp);
|
| Thumb2SizeReduction.cpp | 458 MIB.addOperand(MI->getOperand(0));
459 MIB.addOperand(MI->getOperand(1));
472 MIB.addOperand(MI->getOperand(OpNum));
519 .addOperand(MI->getOperand(0))
520 .addOperand(MI->getOperand(1))
675 MIB.addOperand(MI->getOperand(0));
690 MIB.addOperand(MI->getOperand(i));
766 MIB.addOperand(MI->getOperand(0));
795 MIB.addOperand(MO);
[all...] |
| Thumb2ITBlockPass.cpp | 185 MI->addOperand(MachineOperand::CreateReg(ARM::ITSTATE, false/*ifDef*/,
210 NMI->addOperand(MachineOperand::CreateReg(ARM::ITSTATE, false/*ifDef*/,
|
| /external/llvm/lib/Target/ARM/AsmParser/ |
| ARMAsmParser.cpp | [all...] |
| /external/llvm/lib/Target/Mips/Disassembler/ |
| MipsDisassembler.cpp | 334 Inst.addOperand(MCOperand::CreateReg(Reg));
345 Inst.addOperand(MCOperand::CreateReg(Reg));
357 Inst.addOperand(MCOperand::CreateReg(Reg));
369 Inst.addOperand(MCOperand::CreateReg(Reg));
377 Inst.addOperand(MCOperand::CreateReg(RegNo));
393 Inst.addOperand(MCOperand::CreateReg(Reg));
396 Inst.addOperand(MCOperand::CreateReg(Reg));
397 Inst.addOperand(MCOperand::CreateReg(Base));
398 Inst.addOperand(MCOperand::CreateImm(Offset));
414 Inst.addOperand(MCOperand::CreateReg(Reg))
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| MachineInstrBuilder.h | 63 MI->addOperand(MachineOperand::CreateReg(RegNo,
79 MI->addOperand(MachineOperand::CreateImm(Val));
84 MI->addOperand(MachineOperand::CreateCImm(Val));
89 MI->addOperand(MachineOperand::CreateFPImm(Val));
95 MI->addOperand(MachineOperand::CreateMBB(MBB, TargetFlags));
100 MI->addOperand(MachineOperand::CreateFI(Idx));
107 MI->addOperand(MachineOperand::CreateCPI(Idx, Offset, TargetFlags));
113 MI->addOperand(MachineOperand::CreateTargetIndex(Idx, Offset, TargetFlags));
119 MI->addOperand(MachineOperand::CreateJTI(Idx, TargetFlags));
126 MI->addOperand(MachineOperand::CreateGA(GV, Offset, TargetFlags))
[all...] |
| /external/llvm/lib/Target/MBlaze/Disassembler/ |
| MBlazeDisassembler.cpp | 548 instr.addOperand(MCOperand::CreateReg(RD));
549 instr.addOperand(MCOperand::CreateReg(RB));
550 instr.addOperand(MCOperand::CreateReg(RA));
556 instr.addOperand(MCOperand::CreateReg(RD));
557 instr.addOperand(MCOperand::CreateReg(RA));
558 instr.addOperand(MCOperand::CreateReg(RB));
564 instr.addOperand(MCOperand::CreateReg(RD));
565 instr.addOperand(MCOperand::CreateReg(RA));
575 instr.addOperand(MCOperand::CreateReg(RD));
576 instr.addOperand(MCOperand::CreateImm(insn&0x3FFF))
[all...] |
| /external/llvm/lib/Target/X86/AsmParser/ |
| X86AsmParser.cpp | 376 Inst.addOperand(MCOperand::CreateImm(CE->getValue()));
378 Inst.addOperand(MCOperand::CreateExpr(Expr));
383 Inst.addOperand(MCOperand::CreateReg(getReg()));
427 Inst.addOperand(MCOperand::CreateReg(getMemBaseReg()));
428 Inst.addOperand(MCOperand::CreateImm(getMemScale()));
429 Inst.addOperand(MCOperand::CreateReg(getMemIndexReg()));
431 Inst.addOperand(MCOperand::CreateReg(getMemSegReg()));
438 Inst.addOperand(MCOperand::CreateImm(CE->getValue()));
440 Inst.addOperand(MCOperand::CreateExpr(getMemDisp()));
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86MCInstLower.cpp | 230 OutMI.addOperand(OutMI.getOperand(0));
231 OutMI.addOperand(OutMI.getOperand(0));
253 Inst.addOperand(Saved);
304 Inst.addOperand(Saved);
349 OutMI.addOperand(MCOp);
400 OutMI.addOperand(Saved);
426 OutMI.addOperand(Saved);
538 OutMI.addOperand(MCOperand::CreateReg(X86::R10));
539 OutMI.addOperand(MCOperand::CreateReg(X86::RAX));
587 LEA.addOperand(MCOperand::CreateReg(X86::RDI)); // des
[all...] |
| /external/llvm/lib/Target/ARM/Disassembler/ |
| ARMDisassembler.cpp | 595 MI.addOperand(MCOperand::CreateExpr(ARMMCExpr::CreateUpper16(Expr, *Ctx)));
597 MI.addOperand(MCOperand::CreateExpr(ARMMCExpr::CreateLower16(Expr, *Ctx)));
599 MI.addOperand(MCOperand::CreateExpr(Expr));
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| InstrEmitter.cpp | 225 MI->addOperand(MachineOperand::CreateReg(VRBase, true));
240 MI->addOperand(MachineOperand::CreateReg(Reg, true));
252 MI->addOperand(MachineOperand::CreateReg(VRBase, true));
348 MI->addOperand(MachineOperand::CreateReg(VReg, isOptDef,
355 /// AddOperand - Add the specified operand to the specified machine instr. II
358 void InstrEmitter::AddOperand(MachineInstr *MI, SDValue Op,
367 MI->addOperand(MachineOperand::CreateImm(C->getSExtValue()));
370 MI->addOperand(MachineOperand::CreateFPImm(CFP));
376 MI->addOperand(MachineOperand::CreateReg(R->getReg(), false, Imp));
378 MI->addOperand(MachineOperand::CreateRegMask(RM->getRegMask()))
[all...] |
| /external/llvm/lib/Target/X86/Disassembler/ |
| X86Disassembler.cpp | 174 mcInst.addOperand(MCOperand::CreateReg(llvmRegnum));
285 MI.addOperand(MCOperand::CreateExpr(Expr));
385 mcInst.addOperand(MCOperand::CreateReg(X86::XMM0 + (immediate >> 4)));
388 mcInst.addOperand(MCOperand::CreateReg(X86::YMM0 + (immediate >> 4)));
420 mcInst.addOperand(MCOperand::CreateImm(immediate));
451 mcInst.addOperand(MCOperand::CreateReg(X86::x)); break;
631 mcInst.addOperand(baseReg);
632 mcInst.addOperand(scaleAmount);
633 mcInst.addOperand(indexReg);
637 mcInst.addOperand(displacement)
[all...] |
| /frameworks/compile/slang/ |
| slang_rs_backend.cpp | 261 mExportVarMetadata->addOperand(
271 mRSObjectSlotsMetadata->addOperand(llvm::MDNode::get(mLLVMContext,
402 mExportFuncMetadata->addOperand(
432 mExportForEachNameMetadata->addOperand(
440 mExportForEachSignatureMetadata->addOperand(
471 mExportTypeMetadata->addOperand(
498 StructInfoMetadata->addOperand(
|
| slang_rs_metadata_spec_encoder.cpp | 285 RecordInfoMetadata->addOperand(llvm::MDNode::get(mModule->getContext(),
330 mVarInfoMetadata->addOperand(llvm::MDNode::get(mModule->getContext(),
356 mFuncInfoMetadata->addOperand(llvm::MDNode::get(mModule->getContext(),
434 RSMetadataStrTab->addOperand(llvm::MDNode::get(mModule->getContext(),
476 RSTypeInfo->addOperand(llvm::MDNode::get(mModule->getContext(),
|
| /external/llvm/lib/Target/MBlaze/AsmParser/ |
| MBlazeAsmParser.cpp | 184 Inst.addOperand(MCOperand::CreateImm(0));
186 Inst.addOperand(MCOperand::CreateImm(CE->getValue()));
188 Inst.addOperand(MCOperand::CreateExpr(Expr));
193 Inst.addOperand(MCOperand::CreateReg(getReg()));
209 Inst.addOperand(MCOperand::CreateReg(getMemBase()));
213 Inst.addOperand(MCOperand::CreateReg(RegOff));
|
| /external/llvm/unittests/VMCore/ |
| MetadataTest.cpp | 143 NMD->addOperand(n);
144 NMD->addOperand(n2);
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonMCInstLower.cpp | 91 MCI.addOperand(MCO);
|
| HexagonPeephole.cpp | 200 MI->addOperand(MachineOperand::CreateReg(PeepholeSrc, false));
207 MI->addOperand(MachineOperand::CreateReg(PeepholeSrc.first,
|
| /external/llvm/lib/Target/MSP430/ |
| MSP430BranchSelector.cpp | 156 .addImm(4).addOperand(Cond[0]);
|
| MSP430MCInstLower.cpp | 151 OutMI.addOperand(MCOp);
|
| /external/llvm/lib/Target/NVPTX/ |
| VectorElementize.cpp | 264 copy->addOperand(MachineOperand::CreateReg(scalarRegs[i], true));
268 copy->addOperand(otherOperands[i]);
300 copy->addOperand(MachineOperand::CreateReg(scalarRegs[i], false));
303 copy->addOperand(otherOperands[i]);
339 copy->addOperand(MachineOperand::CreateReg(src1[elem], false));
341 copy->addOperand(MachineOperand::CreateReg(src2[elem], false));
364 copy->addOperand(MachineOperand::CreateReg(src[which.getImm()], false));
396 copy->addOperand(MachineOperand::CreateReg(src[i], false));
398 copy->addOperand(Instr->getOperand(2));
425 copy->addOperand(Instr->getOperand(1+i))
[all...] |
