| /external/llvm/lib/Target/ARM/ |
| ARMHazardRecognizer.cpp | 22 const MCInstrDesc &MCID = MI->getDesc();
43 const MCInstrDesc &MCID = MI->getDesc();
46 const MCInstrDesc &LastMCID = LastMI->getDesc();
|
| ARMCodeEmitter.cpp | 279 const MCInstrDesc &MCID = MI.getDesc();
481 const MCInstrDesc &MCID = MI.getDesc();
563 switch (MI.getDesc().TSFlags & ARMII::FormMask) {
817 const MCInstrDesc &MCID = MI.getDesc();
844 const MCInstrDesc &MCID = MI.getDesc();
869 unsigned Opcode = MI.getDesc().Opcode;
[all...] |
| MLxExpansionPass.cpp | 140 const MCInstrDesc &MCID = MI->getDesc();
278 const MCInstrDesc &MCID = MI->getDesc();
|
| ARMBaseInstrInfo.cpp | 127 uint64_t TSFlags = MI->getDesc().TSFlags;
147 const MCInstrDesc &MCID = MI->getDesc();
526 if ((MI->getDesc().TSFlags & ARMII::DomainMask) == ARMII::DomainNEON) {
551 const MCInstrDesc &MCID = MI->getDesc();
[all...] |
| /external/llvm/lib/Support/ |
| Statistic.cpp | 93 return std::strcmp(LHS->getDesc(), RHS->getDesc()) < 0;
137 Stats.Stats[i]->getDesc());
|
| /external/llvm/lib/CodeGen/ |
| TargetInstrInfoImpl.cpp | 63 const MCInstrDesc &MCID = MI->getDesc();
89 MI->getDesc().getOperandConstraint(Idx1, MCOI::TIED_TO) == 0) {
94 MI->getDesc().getOperandConstraint(Idx2, MCOI::TIED_TO) == 0) {
128 const MCInstrDesc &MCID = MI->getDesc();
163 const MCInstrDesc &MCID = MI->getDesc();
553 unsigned Class = MI->getDesc().getSchedClass();
582 return ItinData->getStageLatency(MI->getDesc().getSchedClass());
591 unsigned DefClass = DefMI->getDesc().getSchedClass();
602 unsigned DefClass = DefMI->getDesc().getSchedClass();
603 unsigned UseClass = UseMI->getDesc().getSchedClass()
[all...] |
| PeepholeOptimizer.cpp | 307 unsigned NumDefs = MI->getDesc().getNumDefs();
308 unsigned NumSrcs = MI->getDesc().getNumOperands() - NumDefs;
337 NumDefs = DefMI->getDesc().getNumDefs();
338 NumSrcs = DefMI->getDesc().getNumOperands() - NumDefs;
415 const MCInstrDesc &MCID = MI->getDesc();
435 const MCInstrDesc &MCID = MI->getDesc();
456 for (unsigned i = 0, e = MI->getDesc().getNumOperands(); i != e; ++i) {
|
| DFAPacketizer.cpp | 92 const llvm::MCInstrDesc &MID = MI->getDesc();
99 const llvm::MCInstrDesc &MID = MI->getDesc();
|
| ExecutionDepsFix.cpp | 455 const MCInstrDesc &MCID = MI->getDesc();
511 for (unsigned i = mi->getDesc().getNumDefs(),
512 e = mi->getDesc().getNumOperands(); i != e; ++i) {
521 for (unsigned i = 0, e = mi->getDesc().getNumDefs(); i != e; ++i) {
540 for (unsigned i = mi->getDesc().getNumDefs(),
541 e = mi->getDesc().getNumOperands(); i != e; ++i) {
630 for (unsigned i = 0, e = mi->getDesc().getNumOperands(); i != e; ++i) {
|
| CriticalAntiDepBreaker.cpp | 192 if (i < MI->getDesc().getNumOperands())
193 NewRC = TII->getRegClass(MI->getDesc(), i, TRI, MF);
287 if (i < MI->getDesc().getNumOperands())
288 NewRC = TII->getRegClass(MI->getDesc(), i, TRI, MF);
|
| MachineInstr.cpp | 604 : MCID(&MI.getDesc()), Flags(0), AsmPrinterFlags(0),
819 if (MII->getDesc().getFlags() & Mask) {
[all...] |
| /external/llvm/include/llvm/ADT/ |
| Statistic.h | 44 const char *getDesc() const { return Desc; }
|
| /external/llvm/include/llvm/Support/ |
| Registry.h | 31 const char *getDesc() const { return Desc; }
48 static const char *descof(const entry &Entry) { return Entry.getDesc(); }
|
| /frameworks/base/tools/aidl/ |
| generate_java_binder.cpp | 506 Method* getDesc = new Method;
507 getDesc->modifiers = PUBLIC;
508 getDesc->returnType = STRING_TYPE;
509 getDesc->returnTypeDimension = 0;
510 getDesc->name = "getInterfaceDescriptor";
511 getDesc->statements = new StatementBlock;
512 getDesc->statements->Add(new ReturnStatement(new LiteralExpression("DESCRIPTOR")));
513 proxy->elements.push_back(getDesc);
|
| /external/llvm/lib/Target/Mips/ |
| Mips16InstrInfo.cpp | 101 switch(MI->getDesc().getOpcode()) {
|
| MipsLongBranch.cpp | 108 for (unsigned I = 0, E = Br.getDesc().getNumOperands(); I < E; ++I) {
225 for (unsigned I = 0, E = Br->getDesc().getNumOperands(); I < E; ++I) {
368 assert(I.Br->getDesc().getNumOperands() == 1);
|
| /external/llvm/lib/Target/CellSPU/ |
| SPUNopFiller.cpp | 139 int sc = instr.getDesc().getSchedClass();
|
| /external/skia/include/core/ |
| SkDescriptor.h | 167 SkDescriptor* getDesc() const { return fDesc; }
|
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXInstrInfo.cpp | 119 unsigned TSFlags = (MI.getDesc().TSFlags & NVPTX::SimpleMoveMask) >>
162 unsigned TSFlags = (MI.getDesc().TSFlags & NVPTX::isLoadMask) >>
173 unsigned TSFlags = (MI.getDesc().TSFlags & NVPTX::isStoreMask) >>
|
| /external/llvm/include/llvm/CodeGen/ |
| LexicalScopes.h | 173 const MDNode *getDesc() const { return Desc; }
|
| MachineInstr.h | 252 /// getDesc - Returns the target instruction descriptor of this
254 const MCInstrDesc &getDesc() const { return *MCID; }
315 return getDesc().getFlags() & (1 << MCFlag);
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86InstrBuilder.h | 152 const MCInstrDesc &MCID = MI->getDesc();
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonVLIWPacketizer.cpp | 349 return (MI->getDesc().isTerminator() || MI->getDesc().isCall());
[all...] |
| HexagonNewValueJump.cpp | 159 if (MII->getDesc().mayStore())
461 assert((MI->getDesc().isCompare()) &&
|
| /external/llvm/include/llvm/Target/ |
| TargetInstrInfo.h | 71 (MI->getDesc().isRematerializable() &&
[all...] |
