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Searched
refs:setOpcode
(Results
1 - 25
of
36
) sorted by null
1
2
/external/llvm/lib/Target/Mips/
MipsDirectObjLower.cpp
45
Inst.
setOpcode
(Mips::DSLL32);
48
Inst.
setOpcode
(Mips::DSRL32);
51
Inst.
setOpcode
(Mips::DSRA32);
77
InstIn.
setOpcode
((Opcode == Mips::DEXT) ? Mips::DEXTU : Mips::DINSU);
83
InstIn.
setOpcode
((Opcode == Mips::DEXT) ? Mips::DEXTM : Mips::DINSM);
MipsMCInstLower.cpp
117
Inst.
setOpcode
(Opc);
152
OutMI.
setOpcode
(MI->getOpcode());
/external/llvm/lib/Target/X86/
X86MCInstLower.cpp
224
OutMI.
setOpcode
(NewOpc);
229
OutMI.
setOpcode
(NewOpc);
252
Inst.
setOpcode
(Opcode);
303
Inst.
setOpcode
(Opcode);
308
OutMI.
setOpcode
(MI->getOpcode());
399
OutMI.
setOpcode
(Opcode);
407
OutMI.
setOpcode
(X86::RET);
425
OutMI.
setOpcode
(Opcode);
433
case X86::ADD16rr_DB: OutMI.
setOpcode
(X86::OR16rr); goto ReSimplify;
434
case X86::ADD32rr_DB: OutMI.
setOpcode
(X86::OR32rr); goto ReSimplify
[
all
...]
/external/llvm/lib/Target/ARM/
ARMInstrInfo.cpp
34
NopInst.
setOpcode
(ARM::HINT);
39
NopInst.
setOpcode
(ARM::MOVr);
ARMAsmPrinter.cpp
[
all
...]
ARMMCInstLower.cpp
116
OutMI.
setOpcode
(MI->getOpcode());
Thumb1InstrInfo.cpp
30
NopInst.
setOpcode
(ARM::tMOVr);
Thumb2InstrInfo.cpp
38
NopInst.
setOpcode
(ARM::tNOP);
/external/llvm/lib/Target/Hexagon/
HexagonMCInstLower.cpp
43
MCI.
setOpcode
(MI->getOpcode());
/prebuilts/sdk/tools/lib/
asm-tree-4.0.jar
/prebuilts/tools/common/asm-tools/
asm-tree-4.0.jar
/external/llvm/lib/Target/X86/AsmParser/
X86AsmParser.cpp
[
all
...]
/external/llvm/lib/Target/MBlaze/MCTargetDesc/
MBlazeAsmBackend.cpp
103
Res.
setOpcode
(getRelaxedOpcode(Inst.getOpcode()));
/external/llvm/lib/Target/MSP430/
MSP430MCInstLower.cpp
110
OutMI.
setOpcode
(MI->getOpcode());
/external/llvm/lib/Target/ARM/AsmParser/
ARMAsmParser.cpp
[
all
...]
/external/llvm/lib/Target/ARM/Disassembler/
ARMDisassembler.cpp
[
all
...]
/external/llvm/include/llvm/MC/
MCInst.h
157
void
setOpcode
(unsigned Op) { Opcode = Op; }
/external/llvm/lib/Target/MBlaze/
MBlazeMCInstLower.cpp
116
OutMI.
setOpcode
(MI->getOpcode());
/external/llvm/lib/Target/PowerPC/
PPCAsmPrinter.cpp
337
TmpInst.
setOpcode
(PPC::BL_Darwin); // Darwin vs SVR4 doesn't matter here.
358
TmpInst.
setOpcode
(PPC::LD);
388
TmpInst.
setOpcode
(Subtarget.isPPC64() ? PPC::MFCR8 : PPC::MFCR);
PPCMCInstLower.cpp
146
OutMI.
setOpcode
(MI->getOpcode());
/external/llvm/lib/Target/Hexagon/InstPrinter/
HexagonInstPrinter.cpp
60
Nop.
setOpcode
(Hexagon::NOP);
/external/eclipse-basebuilder/basebuilder-3.6.2/org.eclipse.releng.basebuilder/plugins/
org.objectweb.asm_3.2.0.v200909071300.jar
/external/llvm/lib/Target/X86/MCTargetDesc/
X86AsmBackend.cpp
278
Res.
setOpcode
(RelaxedOp);
/external/llvm/lib/Target/ARM/MCTargetDesc/
ARMAsmBackend.cpp
213
Res.
setOpcode
(RelaxedOp);
/external/llvm/lib/Target/X86/Disassembler/
X86Disassembler.cpp
786
mcInst.
setOpcode
(insn.instructionID);
Completed in 391 milliseconds
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