| /external/llvm/lib/CodeGen/ |
| RegAllocFast.cpp | 57 MachineRegisterInfo *MRI;
210 MachineRegisterInfo::reg_nodbg_iterator I = MRI->reg_nodbg_begin(MO.getReg());
213 return ++I == MRI->reg_nodbg_end();
271 const TargetRegisterClass *RC = MRI->getRegClass(LRI->VirtReg);
508 const TargetRegisterClass *RC = MRI->getRegClass(VirtReg);
582 MRI->hasOneNonDBGUse(VirtReg)) {
583 const MachineInstr &UseMI = *MRI->use_nodbg_begin(VirtReg);
615 const TargetRegisterClass *RC = MRI->getRegClass(VirtReg);
[all...] |
| SplitKit.cpp | 133 const MachineRegisterInfo &MRI = MF.getRegInfo();
135 I = MRI.use_nodbg_begin(CurLI->reg), E = MRI.use_nodbg_end(); I != E;
330 MRI(vrm.getMachineFunction().getRegInfo()),
[all...] |
| StrongPHIElimination.cpp | 144 MachineRegisterInfo *MRI;
234 MRI = &MF.getRegInfo();
253 MachineInstr *DefMI = MRI->getVRegDef(SrcReg);
362 MRI->replaceRegWith(DestReg, NewReg);
564 while (NewParent && (!DT->dominates(MRI->getVRegDef(NewParent), *BBI)
620 && (!DT->dominates(MRI->getVRegDef(NewParent)->getParent(), &MBB)
689 const TargetRegisterClass *RC = MRI->getRegClass(SrcReg);
690 CopyReg = MRI->createVirtualRegister(RC);
761 const TargetRegisterClass *RC = MRI->getRegClass(DestReg);
762 unsigned CopyReg = MRI->createVirtualRegister(RC)
[all...] |
| TailDuplication.cpp | 65 MachineRegisterInfo *MRI;
133 MRI = &MF.getRegInfo();
135 PreRegAlloc = MRI->isSSA();
137 if (MRI->tracksLiveness() && TRI->trackLivenessAfterRegAlloc(MF))
236 MachineInstr *DefMI = MRI->getVRegDef(VReg);
253 MachineRegisterInfo::use_iterator UI = MRI->use_begin(VReg);
254 while (UI != MRI->use_end()) {
284 if (MRI->hasOneNonDBGUse(Src) &&
285 MRI->constrainRegClass(Src, MRI->getRegClass(Dst)))
[all...] |
| BranchFolding.cpp | 189 MachineRegisterInfo &MRI = MF.getRegInfo();
190 if (MRI.tracksLiveness() && TRI->trackLivenessAfterRegAlloc(MF))
193 MRI.invalidateLiveness();
[all...] |
| IfConversion.cpp | 158 MachineRegisterInfo *MRI;
268 MRI = &MF.getRegInfo();
272 PreRegAlloc = MRI->isSSA();
[all...] |
| InlineSpiller.cpp | 63 MachineRegisterInfo &MRI;
147 MRI(mf.getRegInfo()),
239 RI = MRI.reg_nodbg_begin(SnipLI.reg);
277 for (MachineRegisterInfo::reg_iterator RI = MRI.reg_begin(Reg);
726 MRI.getRegClass(SVI.SpillReg), &TRI);
760 for (MachineRegisterInfo::use_nodbg_iterator UI = MRI.use_nodbg_begin(Reg);
[all...] |
| LiveIntervalAnalysis.cpp | 103 MRI = &MF->getRegInfo();
117 VirtRegIntervals.resize(MRI->getNumVirtRegs());
145 for (unsigned i = 0, e = MRI->getNumVirtRegs(); i != e; ++i) {
474 for (unsigned i = 0, e = MRI->getNumVirtRegs(); i != e; ++i) {
476 if (MRI->reg_nodbg_empty(Reg))
533 if (!MRI->reg_empty(Root))
536 if (!MRI->reg_empty(*Supers))
545 if (!isReserved(Root) && !MRI->reg_empty(Root))
549 if (!isReserved(Reg) && !MRI->reg_empty(Reg))
618 for (MachineRegisterInfo::reg_iterator I = MRI->reg_begin(li->reg)
[all...] |
| MachineLICM.cpp | 68 MachineRegisterInfo *MRI;
328 MRI = &MF.getRegInfo();
331 PreRegAlloc = MRI->isSSA();
772 static bool isOperandKill(const MachineOperand &MO, MachineRegisterInfo *MRI) {
773 return MO.isKill() || MRI->hasOneNonDBGUse(MO.getReg());
782 const TargetRegisterClass *RC = MRI->getRegClass(Reg);
827 bool isKill = isOperandKill(MO, MRI);
856 else if (!isNew && isOperandKill(MO, MRI)) {
[all...] |
| MachineVerifier.cpp | 69 const MachineRegisterInfo *MRI;
290 MRI = &MF.getRegInfo();
477 if (MRI->isSSA()) {
833 if (MRI->tracksLiveness() && !MI->isDebugValue())
860 if (!MRI->isSSA() && MO->isUse() &&
884 const TargetRegisterClass *RC = MRI->getRegClass(Reg);
[all...] |
| RegisterCoalescer.cpp | 73 MachineRegisterInfo* MRI;
241 const MachineRegisterInfo &MRI = MI->getParent()->getParent()->getRegInfo();
253 Dst = TRI.getMatchingSuperReg(Dst, SrcSub, MRI.getRegClass(Src));
256 } else if (!MRI.getRegClass(Src)->contains(Dst)) {
261 const TargetRegisterClass *SrcRC = MRI.getRegClass(Src);
262 const TargetRegisterClass *DstRC = MRI.getRegClass(Dst);
597 MRI->use_nodbg_begin(IntA.reg),
598 UE = MRI->use_nodbg_end(); UI != UE; ++UI) {
620 !MRI->constrainRegClass(IntB.reg, MRI->getRegClass(IntA.reg))
[all...] |
| TwoAddressInstructionPass.cpp | 68 MachineRegisterInfo *MRI;
225 UI = MRI->use_nodbg_begin(SavedReg),
226 UE = MRI->use_nodbg_end(); UI != UE; ++UI) {
311 for (MachineRegisterInfo::reg_iterator I = MRI->reg_begin(Reg),
312 E = MRI->reg_end(); I != E; ++I) {
367 const MachineRegisterInfo *MRI,
375 MachineRegisterInfo::def_iterator Begin = MRI->def_begin(Reg);
378 if (llvm::next(Begin) != MRI->def_end())
414 MachineRegisterInfo *MRI,
418 if (!MRI->hasOneNonDBGUse(Reg)
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMBaseRegisterInfo.cpp | 459 MachineRegisterInfo *MRI = &MF.getRegInfo();
460 std::pair<unsigned, unsigned> Hint = MRI->getRegAllocationHint(Reg);
469 Hint = MRI->getRegAllocationHint(OtherReg);
472 MRI->setRegAllocationHint(OtherReg, Hint.first, NewReg);
534 const MachineRegisterInfo *MRI = &MF.getRegInfo();
546 if (!MRI->canReserveReg(FramePtr))
556 return MRI->canReserveReg(BasePtr);
[all...] |
| ARMBaseInstrInfo.cpp | [all...] |
| ARMLoadStoreOptimizer.cpp | [all...] |
| ARMISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCCTRLoops.cpp | 61 MachineRegisterInfo *MRI;
208 MRI = &MF.getRegInfo();
267 MachineInstr *DI = MRI->getVRegDef(MPhi->getOperand(i).getReg());
341 RI = MRI->reg_begin(IV_Opnd->getReg()), RE = MRI->reg_end();
363 const MachineInstr *IV_DefInstr = MRI->getVRegDef(IV_Opnd->getReg());
371 const MachineInstr *DefInstr = MRI->getVRegDef(InitialValueReg);
378 MRI->getVRegDef(DefInstr->getOperand(0).getReg());
479 if (!MRI->use_nodbg_empty(Reg)) {
483 MachineRegisterInfo::use_iterator I = MRI->use_begin(Reg)
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| ScheduleDAG.h | 523 MachineRegisterInfo &MRI; // Virtual/real register map
|
| /external/llvm/lib/MC/ |
| MCAsmStreamer.cpp | 901 const MCRegisterInfo &MRI = getContext().getRegisterInfo();
902 unsigned LLVMRegister = MRI.getLLVMRegNum(Register, true);
[all...] |
| MCDwarf.cpp | 832 const MCRegisterInfo &MRI,
836 unsigned(MRI.getDwarfRegNum(Loc.getReg(), true));
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAGISel.cpp | 460 MachineRegisterInfo &MRI = MF->getRegInfo();
474 MRI.replaceRegWith(From, To);
[all...] |
| SelectionDAGBuilder.cpp | [all...] |
| /external/llvm/lib/Target/X86/ |
| X86InstrInfo.cpp | [all...] |
| X86ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/ARM/AsmParser/ |
| ARMAsmParser.cpp | 47 const MCRegisterInfo *MRI;
245 MRI = &getContext().getRegisterInfo();
[all...] |
