/external/llvm/utils/TableGen/ |
AsmMatcherEmitter.cpp | 372 static ResOperand getRegOp(Record *Reg) { 375 X.Register = Reg; 768 if (Record *Reg = AsmOperands[i].SingletonReg) 769 SingletonRegisters.insert(Reg); [all...] |
CodeGenRegisters.cpp | 128 CodeGenRegister *Reg = RegBank.getReg(Aliases[i]); 129 ExplicitAliases.push_back(Reg); 130 Reg->ExplicitAliases.push_back(this); 476 // Make sure all sub-registers have been visited first, so the super-reg 615 Record *Reg = Lists[i][n]; 617 Name += Reg->getName(); 618 Tuple.push_back(DefInit::get(Reg)); 620 unsigned(Reg->getValueAsInt("CostPerUse"))); 716 const CodeGenRegister *Reg = RegBank.getReg((*Elements)[i]); 717 Members.insert(Reg); [all...] |
/external/qemu/target-i386/ |
ops_sse.h | 22 #define Reg MMXReg 30 #define Reg XMMReg 39 void glue(helper_psrlw, SUFFIX)(Reg *d, Reg *s) 63 void glue(helper_psraw, SUFFIX)(Reg *d, Reg *s) 84 void glue(helper_psllw, SUFFIX)(Reg *d, Reg *s) 108 void glue(helper_psrld, SUFFIX)(Reg *d, Reg *s [all...] |
/external/valgrind/main/VEX/priv/ |
host_amd64_defs.h | 129 Aam_IR, /* Immediate + Reg */ 140 HReg reg; member in struct:__anon14562::__anon14563::__anon14564 160 /* --------- Operand, which can be reg, immediate or memory. --------- */ 178 HReg reg; member in struct:__anon14567::__anon14568::__anon14570 179 } Reg; 196 /* --------- Operand, which can be reg or immediate only. --------- */ 213 HReg reg; member in struct:__anon14573::__anon14574::__anon14576 214 } Reg; 226 /* --------- Operand, which can be reg or memory only. --------- */ 240 HReg reg; member in struct:__anon14578::__anon14579::__anon14580 632 HReg reg; member in struct:__anon14588::__anon14589::__anon14622 637 HReg reg; member in struct:__anon14588::__anon14589::__anon14623 [all...] |
host_ppc_defs.h | 51 extern HReg hregPPC_GPR0 ( Bool mode64 ); // scratch reg / zero reg 200 Pam_IR=1, /* Immediate (signed 16-bit) + Reg */ 229 /* --------- Operand, which can be a reg or a u16/s16. --------- */ 247 HReg reg; member in struct:__anon14739::__anon14740::__anon14742 248 } Reg; 260 /* --------- Operand, which can be a reg or a u32/64. --------- */ 274 HReg Reg; 286 /* --------- Operand, which can be a vector reg or a s6. --------- */ 300 HReg Reg; 655 HReg reg; member in struct:__anon14756::__anon14757::__anon14779 707 HReg reg; member in struct:__anon14756::__anon14757::__anon14787 [all...] |
host_x86_defs.h | 113 Xam_IR, /* Immediate + Reg */ 124 HReg reg; member in struct:__anon14847::__anon14848::__anon14849 144 /* --------- Operand, which can be reg, immediate or memory. --------- */ 162 HReg reg; member in struct:__anon14852::__anon14853::__anon14855 163 } Reg; 179 /* --------- Operand, which can be reg or immediate only. --------- */ 196 HReg reg; member in struct:__anon14858::__anon14859::__anon14861 197 } Reg; 209 /* --------- Operand, which can be reg or memory only. --------- */ 223 HReg reg; member in struct:__anon14863::__anon14864::__anon14865 523 HReg reg; member in struct:__anon14873::__anon14874::__anon14897 532 HReg reg; member in struct:__anon14873::__anon14874::__anon14898 573 HReg reg; member in struct:__anon14873::__anon14874::__anon14905 578 HReg reg; member in struct:__anon14873::__anon14874::__anon14906 [all...] |
/external/llvm/lib/Target/Mips/ |
MipsISelLowering.cpp | [all...] |
/external/llvm/lib/Transforms/Scalar/ |
LoopStrengthReduce.cpp | 48 // we may not actually need both reg and (-1 * reg) in registers; the 141 void CountRegister(const SCEV *Reg, size_t LUIdx); 142 void DropRegister(const SCEV *Reg, size_t LUIdx); 145 bool isRegUsedByUsesOtherThan(const SCEV *Reg, size_t LUIdx) const; 147 const SmallBitVector &getUsedByIndices(const SCEV *Reg) const; 162 RegUseTracker::CountRegister(const SCEV *Reg, size_t LUIdx) { 164 RegUsesMap.insert(std::make_pair(Reg, RegSortData())); 167 RegSequence.push_back(Reg); 173 RegUseTracker::DropRegister(const SCEV *Reg, size_t LUIdx) [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
SelectionDAGBuilder.cpp | 588 unsigned Reg, Type *Ty) { 596 Regs.push_back(Reg + i); 598 Reg += NumRegs; [all...] |
/external/llvm/lib/Target/ARM/AsmParser/ |
ARMAsmParser.cpp | 347 } Reg; 428 Reg = o.Reg; 510 return Reg.RegNum; [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCISelLowering.cpp | [all...] |
/external/llvm/lib/Target/ARM/ |
ARMISelLowering.cpp | 1659 unsigned reg = State->AllocateReg(GPRArgRegs, 4); local [all...] |
/external/llvm/lib/Target/X86/ |
X86ISelLowering.cpp | [all...] |