| /external/v8/src/x64/ |
| macro-assembler-x64.cc | 833 movsd(Operand(rsp, i * kDoubleSize), reg);
847 movsd(reg, Operand(rsp, i * kDoubleSize));
[all...] |
| assembler-x64.h | [all...] |
| disasm-x64.cc | [all...] |
| assembler-x64.cc | 2605 void Assembler::movsd(const Operand& dst, XMMRegister src) { function in class:v8::internal::Assembler
2615 void Assembler::movsd(XMMRegister dst, XMMRegister src) { function in class:v8::internal::Assembler
2625 void Assembler::movsd(XMMRegister dst, const Operand& src) { function in class:v8::internal::Assembler
[all...] |
| /external/valgrind/main/none/tests/amd64/ |
| insn_sse2.def | 118 movsd xmm.pd[1234.5678,8765.4321] xmm.pd[1111.1111,2222.2222] => 1.pd[1234.5678,2222.2222]
119 movsd m64.pd[1234.5678] xmm.pd[1111.1111,2222.2222] => 1.pd[1234.5678,0.0]
120 movsd xmm.pd[1234.5678,8765.4321] m64.pd[1111.1111] => 1.pd[1234.5678]
[all...] |
| redundantRexW.stdout.exp | 443 after "rex.W movsd (%rcx),%xmm2" (dqws in order [15 .. 0]) {
450 after "rex.W movsd (%rcx),%xmm2" (xmms in order [15..0]) {
469 after "rex.W movsd %xmm7,(%rdi)" (dqws in order [15 .. 0]) {
476 after "rex.W movsd %xmm7,(%rdi)" (xmms in order [15..0]) {
|
| /external/valgrind/main/none/tests/x86/ |
| insn_sse2.def | 118 movsd xmm.pd[1234.5678,8765.4321] xmm.pd[1111.1111,2222.2222] => 1.pd[1234.5678,2222.2222]
119 movsd m64.pd[1234.5678] xmm.pd[1111.1111,2222.2222] => 1.pd[1234.5678,0.0]
120 movsd xmm.pd[1234.5678,8765.4321] m64.pd[1111.1111] => 1.pd[1234.5678]
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86InstrFragmentsSIMD.td | 158 def X86Movsd : SDNode<"X86ISD::MOVSD", SDTShuff2Op>;
|
| X86InstrInfo.td | [all...] |
| X86InstrSSE.td | 454 // Move Instructions. Register-to-register movss/movsd is not used for FR32/64
456 // is used instead. Register-to-register movss/movsd is not modeled as an
458 // in terms of a copy, and just mentioned, we don't use movss/movsd for copies.
480 "movsd\t{$src2, $src1, $dst|$dst, $src1, $src2}">, XD, VEX_4V,
492 "movsd\t{$src2, $src1, $dst|$dst, $src1, $src2}", [],
501 def VMOVSDrm : sse12_move_rm<FR64, f64mem, loadf64, "movsd">, XD, VEX,
510 "movsd\t{$src, $dst|$dst, $src}",
519 "movsd\t{$src2, $dst|$dst, $src2}">, XD;
529 "movsd\t{$src2, $dst|$dst, $src2}", [],
538 def MOVSDrm : sse12_move_rm<FR64, f64mem, loadf64, "movsd">, XD
[all...] |
| X86ISelLowering.cpp | [all...] |
| X86InstrCompiler.td | 310 def REP_MOVSD_32 : I<0xA5, RawFrm, (outs), (ins), "{rep;movsl|rep movsd}",
322 def REP_MOVSD_64 : I<0xA5, RawFrm, (outs), (ins), "{rep;movsl|rep movsd}",
[all...] |
| /external/elfutils/libcpu/defs/ |
| i386 | 617 11110010,00001111,00010000,{Mod}{xmmreg}{R_m}:movsd {Mod}{R_m},{xmmreg}
621 11110010,00001111,00010001,{Mod}{xmmreg}{R_m}:movsd {xmmreg},{Mod}{R_m}
[all...] |
| /external/v8/src/ia32/ |
| disasm-ia32.cc | [all...] |
| code-stubs-ia32.cc | [all...] |
| /external/openssl/crypto/sha/asm/ |
| sha512-586.pl | 439 &data_word(0xA5F3F689); # rep movsd
|
| /external/qemu/target-i386/ |
| translate.c | [all...] |
| /dalvik/vm/compiler/codegen/x86/ |
| LowerHelper.cpp | [all...] |
| /external/llvm/test/MC/X86/ |
| x86-32-coverage.s | 1208 // CHECK: movsd 3735928559(%ebx,%ecx,8), %xmm5
1209 movsd 0xdeadbeef(%ebx,%ecx,8),%xmm5
1211 // CHECK: movsd %xmm5, %xmm5
1212 movsd %xmm5,%xmm5
1214 // CHECK: movsd %xmm5, 3735928559(%ebx,%ecx,8)
1215 movsd %xmm5,0xdeadbeef(%ebx,%ecx,8)
1217 // CHECK: movsd %xmm5, %xmm5
1218 movsd %xmm5,%xmm5
[all...] |
| /dalvik/vm/compiler/codegen/x86/libenc/ |
| enc_tabl.cpp | [all...] |
| /dalvik/vm/mterp/out/ |
| InterpAsm-x86.S | [all...] |
| /external/valgrind/main/VEX/priv/ |
| guest_amd64_toIR.c | [all...] |
| guest_x86_toIR.c | [all...] |
| /external/qemu/ |
| i386-dis.c | [all...] |
| /external/quake/quake/src/QW/scitech/include/ |
| mgraph.h | [all...] |
