/external/llvm/lib/Target/X86/MCTargetDesc/ |
X86MCCodeEmitter.cpp | 67 static unsigned char getVEXRegisterEncoding(const MCInst &MI, 69 unsigned SrcReg = MI.getOperand(OpNum).getReg(); 70 unsigned SrcRegNum = GetX86RegNum(MI.getOperand(OpNum)); 117 void EmitMemModRMByte(const MCInst &MI, unsigned Op, 122 void EncodeInstruction(const MCInst &MI, raw_ostream &OS, 126 const MCInst &MI, const MCInstrDesc &Desc, 130 int MemOperand, const MCInst &MI, 134 const MCInst &MI, const MCInstrDesc &Desc, 165 static bool Is32BitMemOperand(const MCInst &MI, unsigned Op) { 166 const MCOperand &BaseReg = MI.getOperand(Op+X86::AddrBaseReg) [all...] |
/external/llvm/lib/CodeGen/ |
RegAllocFast.cpp | 148 void handleThroughOperands(MachineInstr *MI, 156 void spillVirtReg(MachineBasicBlock::iterator MI, LiveRegMap::iterator); 157 void spillVirtReg(MachineBasicBlock::iterator MI, unsigned VirtReg); 160 void definePhysReg(MachineInstr *MI, unsigned PhysReg, RegState NewState); 170 LiveRegMap::iterator allocVirtReg(MachineInstr *MI, LiveRegMap::iterator, 172 LiveRegMap::iterator defineVirtReg(MachineInstr *MI, unsigned OpNum, 174 LiveRegMap::iterator reloadVirtReg(MachineInstr *MI, unsigned OpNum, 176 void spillAll(MachineInstr *MI); 177 bool setPhysReg(MachineInstr *MI, unsigned OpNum, unsigned PhysReg); 250 void RAFast::spillVirtReg(MachineBasicBlock::iterator MI, unsigned VirtReg) [all...] |
TwoAddressInstructionPass.cpp | 75 // DistanceMap - Keep track the distance of a MI from the start of the 93 bool Sink3AddrInstruction(MachineBasicBlock *MBB, MachineInstr *MI, 101 MachineInstr *MI, MachineBasicBlock *MBB, 104 bool CommuteInstruction(MachineBasicBlock::iterator &mi, 110 bool ConvertInstTo3Addr(MachineBasicBlock::iterator &mi, 116 MachineInstr *MI, MachineBasicBlock *MBB); 119 MachineBasicBlock::iterator &mi, 123 MachineBasicBlock::iterator &mi, 127 bool TryInstructionTransform(MachineBasicBlock::iterator &mi, 137 void ProcessCopy(MachineInstr *MI, MachineBasicBlock *MBB [all...] |
MachineCopyPropagation.cpp | 83 const MachineInstr *MI) { 85 if (MI->getParent() != MBB) 89 MachineBasicBlock::const_iterator E2 = MI; 134 MachineInstr *MI = &*I; 137 if (MI->isCopy()) { 138 unsigned Def = MI->getOperand(0).getReg(); 139 unsigned Src = MI->getOperand(1).getReg(); 150 (!ReservedRegs.test(Src) || NoInterveningSideEffect(CopyMI, MI)) && 166 // Clear any kills of Def between CopyMI and MI. This extends the 168 for (MachineBasicBlock::iterator I = CopyMI, E = MI; I != E; ++I [all...] |
LocalStackSlotAllocation.cpp | 47 MachineBasicBlock::iterator MI; // Instr referencing the frame 51 MI(I), LocalOffset(Offset) {} 55 MachineBasicBlock::iterator getMachineInstr() { return MI; } 201 const MachineInstr *MI, 209 if (TRI->isFrameOffsetLegal(MI, Offset)) 241 MachineInstr *MI = I; 245 if (MI->isDebugValue()) 254 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { 257 if (MI->getOperand(i).isFI()) { 259 if (!MFI->isObjectPreAllocated(MI->getOperand(i).getIndex()) [all...] |
/external/llvm/lib/Target/Mips/ |
Mips16RegisterInfo.cpp | 57 MachineInstr &MI = *II; 58 MachineFunction &MF = *MI.getParent()->getParent(); 102 Offset += MI.getOperand(OpNo + 1).getImm(); 106 MI.getOperand(OpNo).ChangeToRegister(FrameReg, false); 107 MI.getOperand(OpNo + 1).ChangeToImmediate(Offset);
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MipsAsmPrinter.cpp | 53 void MipsAsmPrinter::EmitInstruction(const MachineInstr *MI) { 54 if (MI->isDebugValue()) { 58 PrintDebugValueComment(MI, OS); 62 MachineBasicBlock::const_instr_iterator I = MI; 63 MachineBasicBlock::const_instr_iterator E = MI->getParent()->instr_end(); 312 bool MipsAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum, 319 const MachineOperand &MO = MI->getOperand(OpNum); 323 return AsmPrinter::PrintAsmOperand(MI,OpNum,AsmVariant,ExtraCode,O); 361 const MachineOperand &FlagsOP = MI->getOperand(OpNum - 1); 391 if (RegOp >= MI->getNumOperands() [all...] |
MipsSEInstrInfo.h | 36 virtual unsigned isLoadFromStackSlot(const MachineInstr *MI, 44 virtual unsigned isStoreToStackSlot(const MachineInstr *MI, 48 MachineBasicBlock::iterator MI, DebugLoc DL, 64 virtual bool expandPostRAPseudo(MachineBasicBlock::iterator MI) const;
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/external/llvm/lib/Target/NVPTX/ |
NVPTXutil.cpp | 21 bool isParamLoad(const MachineInstr *MI) 23 if ((MI->getOpcode() != NVPTX::LD_i32_avar) && 24 (MI->getOpcode() != NVPTX::LD_i64_avar)) 26 if (MI->getOperand(2).isImm() == false) 28 if (MI->getOperand(2).getImm() != NVPTX::PTXLdStInstCode::PARAM)
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NVPTXFrameLowering.cpp | 45 MachineInstr *MI = BuildMI(MBB, MBBI, dl, 48 BuildMI(MBB, MI, dl, 52 MachineInstr *MI = BuildMI(MBB, MBBI, dl, 55 BuildMI(MBB, MI, dl,
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/external/llvm/lib/Target/ARM/ |
ARMBaseInstrInfo.cpp | 125 MachineInstr *MI = MBBI; 126 MachineFunction &MF = *MI->getParent()->getParent(); 127 uint64_t TSFlags = MI->getDesc().TSFlags; 140 unsigned MemOpc = getUnindexedOpcode(MI->getOpcode()); 147 const MCInstrDesc &MCID = MI->getDesc(); 149 bool isLoad = !MI->mayStore(); 150 const MachineOperand &WB = isLoad ? MI->getOperand(1) : MI->getOperand(0); 151 const MachineOperand &Base = MI->getOperand(2); 152 const MachineOperand &Offset = MI->getOperand(NumOps-3) [all...] |
ARMConstantIslandPass.cpp | 184 MachineInstr *MI; 193 CPUser(MachineInstr *mi, MachineInstr *cpemi, unsigned maxdisp, 195 : MI(mi), CPEMI(cpemi), MaxDisp(maxdisp), NegOk(neg), IsSoImm(soimm), 199 /// getMaxDisp - Returns the maximum displacement supported by MI. 234 MachineInstr *MI; 238 ImmBranch(MachineInstr *mi, unsigned maxdisp, bool cond, int ubr) 239 : MI(mi), MaxDisp(maxdisp), isCond(cond), UncondBr(ubr) {} 281 MachineBasicBlock *splitBlockBeforeInstr(MachineInstr *MI); [all...] |
Thumb1FrameLowering.h | 39 MachineBasicBlock::iterator MI, 43 MachineBasicBlock::iterator MI,
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ARMFrameLowering.h | 40 MachineBasicBlock::iterator MI, 45 MachineBasicBlock::iterator MI, 63 void emitPushInst(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, 68 void emitPopInst(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
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/external/llvm/lib/Target/X86/ |
X86AsmPrinter.cpp | 212 void X86AsmPrinter::print_pcrel_imm(const MachineInstr *MI, unsigned OpNo, 214 const MachineOperand &MO = MI->getOperand(OpNo); 219 printOperand(MI, OpNo, O); 235 void X86AsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo, 238 const MachineOperand &MO = MI->getOperand(OpNo); 270 void X86AsmPrinter::printSSECC(const MachineInstr *MI, unsigned Op, 272 unsigned char value = MI->getOperand(Op).getImm(); 310 void X86AsmPrinter::printLeaMemReference(const MachineInstr *MI, unsigned Op, 312 const MachineOperand &BaseReg = MI->getOperand(Op); 313 const MachineOperand &IndexReg = MI->getOperand(Op+2) [all...] |
X86CodeEmitter.cpp | 71 const MachineInstr &MI, 75 const MachineInstr &MI, 80 const MachineInstr &MI) const; 82 void emitInstruction(MachineInstr &MI, const MCInstrDesc *Desc); 109 void emitMemModRMByte(const MachineInstr &MI, 148 ++NumEmitted; // Keep track of the # of mi's emitted 159 static unsigned determineREX(const MachineInstr &MI) { 161 const MCInstrDesc &Desc = MI.getDesc(); 177 const MachineOperand& MO = MI.getOperand(i); 187 if (X86InstrInfo::isX86_64ExtendedReg(MI.getOperand(0)) [all...] |
X86FloatingPoint.cpp | 314 bool isFPCopy(MachineInstr *MI) { 315 unsigned DstReg = MI->getOperand(0).getReg(); 316 unsigned SrcReg = MI->getOperand(1).getReg(); 415 MachineInstr *MI = I; 416 uint64_t Flags = MI->getDesc().TSFlags; 419 if (MI->isInlineAsm()) 422 if (MI->isCopy() && isFPCopy(MI)) 425 if (MI->isImplicitDef() && 426 X86::RFP80RegClass.contains(MI->getOperand(0).getReg()) [all...] |
/external/llvm/include/llvm/ADT/ |
UniqueVector.h | 55 typename std::map<T, unsigned>::const_iterator MI = Map.find(Entry); 58 if (MI != Map.end()) return MI->second;
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/external/llvm/include/llvm/CodeGen/ |
RegisterPressure.h | 97 /// Store the effects of a change in pressure on things that MI scheduler cares 178 /// Get the MI position corresponding to this register pressure. 181 // Reset the MI position corresponding to the register pressure. This allows 221 void getMaxUpwardPressureDelta(const MachineInstr *MI, 230 void getMaxDownwardPressureDelta(const MachineInstr *MI, 238 void getMaxPressureDelta(const MachineInstr *MI, RegPressureDelta &Delta, 242 return getMaxDownwardPressureDelta(MI, Delta, CriticalPSets, 246 return getMaxUpwardPressureDelta(MI, Delta, CriticalPSets, 251 void getUpwardPressure(const MachineInstr *MI, 256 void getDownwardPressure(const MachineInstr *MI, [all...] |
/external/llvm/lib/Target/MSP430/ |
MSP430FrameLowering.h | 39 MachineBasicBlock::iterator MI, 43 MachineBasicBlock::iterator MI,
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MSP430InstrInfo.cpp | 35 MachineBasicBlock::iterator MI, 40 if (MI != MBB.end()) DL = MI->getDebugLoc(); 51 BuildMI(MBB, MI, DL, get(MSP430::MOV16mr)) 55 BuildMI(MBB, MI, DL, get(MSP430::MOV8mr)) 63 MachineBasicBlock::iterator MI, 68 if (MI != MBB.end()) DL = MI->getDebugLoc(); 79 BuildMI(MBB, MI, DL, get(MSP430::MOV16rm)) 82 BuildMI(MBB, MI, DL, get(MSP430::MOV8rm) [all...] |
MSP430InstrInfo.h | 60 MachineBasicBlock::iterator MI, 66 MachineBasicBlock::iterator MI, 71 unsigned GetInstSizeInBytes(const MachineInstr *MI) const; 75 bool isUnpredicatedTerminator(const MachineInstr *MI) const;
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/external/llvm/lib/Target/XCore/ |
XCoreFrameLowering.h | 34 MachineBasicBlock::iterator MI, 38 MachineBasicBlock::iterator MI,
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/external/llvm/lib/Target/Hexagon/ |
HexagonVLIWPacketizer.cpp | 108 bool ignorePseudoInstruction(MachineInstr *MI, MachineBasicBlock *MBB); 110 // isSoloInstruction - return true if instruction MI can not be packetized 111 // with any other instruction, which means that MI itself is a packet. 112 bool isSoloInstruction(MachineInstr *MI); 122 MachineBasicBlock::iterator addToPacket(MachineInstr *MI); 124 bool IsCallDependent(MachineInstr* MI, SDep::Kind DepType, unsigned DepReg); 125 bool PromoteToDotNew(MachineInstr* MI, SDep::Kind DepType, 128 bool CanPromoteToDotNew(MachineInstr* MI, SUnit* PacketSU, 133 bool CanPromoteToNewValue(MachineInstr* MI, SUnit* PacketSU, 137 bool CanPromoteToNewValueStore(MachineInstr* MI, MachineInstr* PacketMI [all...] |
/external/chromium/third_party/libjingle/source/talk/session/phone/ |
mediamonitor.h | 65 template<class MC, class MI> 72 sigslot::signal2<MC*, const MI&> SignalUpdate; 81 MI stats(media_info_); 89 MI media_info_;
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