/external/llvm/lib/Target/X86/MCTargetDesc/ |
X86MCTargetDesc.cpp | 235 case X86::R11: case X86::R11D: case X86::R11W: case X86::R11B: 311 case X86::R11: case X86::R11D: case X86::R11W: case X86::R11B:
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X86BaseInfo.h | 597 case X86::R8: case X86::R9: case X86::R10: case X86::R11:
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/external/llvm/lib/Target/CellSPU/ |
SPURegisterInfo.cpp | 65 case SPU::R11: return 11;
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SPUISelLowering.cpp | [all...] |
/external/llvm/lib/Target/ARM/ |
Thumb1FrameLowering.cpp | 100 case ARM::R11:
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ARMFrameLowering.cpp | 189 case ARM::R11: 217 // into spill area 1, including the FP in R11. In either case, it is [all...] |
ARMISelLowering.cpp | [all...] |
/external/llvm/lib/Target/X86/ |
X86FrameLowering.cpp | 104 X86::R8, X86::R9, X86::R10, X86::R11, 0 [all...] |
X86ISelLowering.cpp | [all...] |
/external/llvm/lib/Target/XCore/ |
XCoreFrameLowering.cpp | 105 loadFromStack(MBB, MBBI, XCore::R11, 0, dl, TII);
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/external/valgrind/main/coregrind/m_sigframe/ |
sigframe-amd64-linux.c | 348 SC2(r11,R11); 581 tst->arch.vex.guest_R11 = sc->r11;
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/external/v8/src/ |
platform-linux.cc | 962 enum ArmRegisters {R15 = 15, R13 = 13, R11 = 11}; 1065 sample->fp = reinterpret_cast<Address>(mcontext.gregs[R11]); [all...] |
/external/valgrind/main/memcheck/ |
mc_machine.c | 568 if (o == GOF(R11) && is1248) return o; [all...] |
/external/llvm/lib/Target/ARM/AsmParser/ |
ARMAsmParser.cpp | [all...] |
/external/strace/ |
process.c | [all...] |
/external/llvm/lib/Target/ARM/Disassembler/ |
ARMDisassembler.cpp | [all...] |