| /external/llvm/lib/CodeGen/ |
| MachineTraceMetrics.h | 68 const TargetInstrInfo *TII;
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| PostRASchedulerList.cpp | 81 const TargetInstrInfo *TII;
256 TII = Fn.getTarget().getInstrInfo();
320 if (MI->isCall() || TII->isSchedulingBoundary(MI, MBB, Fn)) {
775 TII->insertNoop(*BB, RegionEnd);
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| ScoreboardHazardRecognizer.cpp | 186 if (DAG->TII->isZeroCost(MCID->Opcode))
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| AggressiveAntiDepBreaker.cpp | 122 TII(MF.getTarget().getInstrInfo()),
385 TII->isPredicated(MI)) {
404 RC = TII->getRegClass(MI->getDesc(), i, TRI, MF);
452 TII->isPredicated(MI);
478 RC = TII->getRegClass(MI->getDesc(), i, TRI, MF);
[all...] |
| RegAllocFast.cpp | 59 const TargetInstrInfo *TII;
274 TII->storeRegToStackSlot(*MBB, MI, LR.PhysReg, SpillKill, FI, RC, TRI);
298 TII->emitFrameIndexDebugValue(*MF, FI, Offset, MDPtr, DL)) {
619 TII->loadRegFromStackSlot(*MBB, MI, LRI->PhysReg, FrameIndex, RC, TRI);
[all...] |
| MachineVerifier.cpp | 67 const TargetInstrInfo *TII;
288 TII = TM->getInstrInfo();
529 if (!TII->AnalyzeBranch(*const_cast<MachineBasicBlock *>(MBB),
553 !TII->isPredicated(getBundleStart(&MBB->back()))) {
692 if (MI->isTerminator() && !TII->isPredicated(MI)) {
782 if (!TII->verifyInstruction(MI, ErrorInfo))
875 TII->getRegClass(MCID, MONum, TRI, *MF)) {
[all...] |
| RegisterCoalescer.cpp | 76 const TargetInstrInfo* TII;
575 if (!TII->findCommutedOpIndices(DefMI, Op1, Op2))
615 MachineInstr *NewMI = TII->commuteInstruction(DefMI);
718 if (!TII->isTriviallyReMaterializable(DefMI, AA))
721 if (!DefMI->isSafeToMove(TII, AA, SawStore))
730 const TargetRegisterClass *RC = TII->getRegClass(MCID, 0, TRI, *MF);
741 TII->reMaterialize(*MBB, MII, DstReg, 0, DefMI, *TRI);
[all...] |
| StrongPHIElimination.cpp | 145 const TargetInstrInfo *TII;
235 TII = MF.getTarget().getInstrInfo();
698 TII->get(TargetOpcode::COPY),
767 TII->get(TargetOpcode::COPY),
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| MachineInstr.cpp | [all...] |
| ScheduleDAG.cpp | 38 TII(TM.getInstrInfo()),
59 return &TII->get(Node->getMachineOpcode());
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| MachineScheduler.cpp | 188 const TargetInstrInfo *TII = MF->getTarget().getInstrInfo();
230 || TII->isSchedulingBoundary(llvm::prior(RegionEnd), MBB, *MF)) {
240 if (TII->isSchedulingBoundary(llvm::prior(I), MBB, *MF))
414 return (UOps >= 0) ? UOps : TII->getNumMicroOps(InstrItins, MI);
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMBaseRegisterInfo.h | 77 const ARMBaseInstrInfo &TII;
89 explicit ARMBaseRegisterInfo(const ARMBaseInstrInfo &tii,
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| ARMBaseInstrInfo.cpp | [all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonVLIWPacketizer.cpp | 163 const TargetInstrInfo *TII = Fn.getTarget().getInstrInfo();
210 if (TII->isSchedulingBoundary(llvm::prior(I), MBB, Fn))
244 const HexagonInstrInfo *QII = (const HexagonInstrInfo *) TII;
259 const HexagonInstrInfo *QII = (const HexagonInstrInfo *) TII;
273 const HexagonInstrInfo *QII = (const HexagonInstrInfo *) TII;
292 const HexagonInstrInfo *QII = (const HexagonInstrInfo *) TII;
353 const HexagonInstrInfo *QII = (const HexagonInstrInfo *) TII;
[all...] |
| /external/llvm/lib/Target/MBlaze/ |
| MBlazeInstrInfo.cpp | 288 const TargetInstrInfo *TII = MF->getTarget().getInstrInfo();
291 BuildMI(FirstMBB, MBBI, DebugLoc(), TII->get(TargetOpcode::COPY),
|
| /external/llvm/lib/Target/MSP430/ |
| MSP430InstrInfo.cpp | 307 const TargetInstrInfo &TII = *MF->getTarget().getInstrInfo();
308 return TII.getInlineAsmLength(MI->getOperand(0).getSymbolName(),
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| /external/llvm/include/llvm/CodeGen/ |
| FastISel.h | 58 const TargetInstrInfo &TII;
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| LiveIntervalAnalysis.h | 54 const TargetInstrInfo* TII;
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| MachineRegisterInfo.h | 469 const TargetInstrInfo &TII);
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| ScheduleDAG.h | 520 const TargetInstrInfo *TII; // Target instruction information
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| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | [all...] |
| X86InstrInfo.cpp | [all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| FunctionLoweringInfo.cpp | 175 const TargetInstrInfo *TII = MF->getTarget().getInstrInfo();
177 BuildMI(MBB, DL, TII->get(TargetOpcode::PHI), PHIReg + i);
|
| SelectionDAGISel.cpp | 344 const TargetInstrInfo &TII = *TM.getInstrInfo();
373 RegInfo->EmitLiveInCopies(EntryMBB, TRI, TII);
405 TII.get(TargetOpcode::DBG_VALUE))
426 TII.get(TargetOpcode::DBG_VALUE))
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCInstrInfo.cpp | 76 const TargetInstrInfo *TII = TM.getInstrInfo();
77 assert(TII && "No InstrInfo?");
79 return new PPCHazardRecognizer970(*TII);
|
