| /external/v8/src/mips/ |
| codegen-mips.cc | 115 __ lw(t0, FieldMemOperand(a2, JSObject::kElementsOffset));
120 __ lw(t1, FieldMemOperand(t0, FixedArray::kLengthOffset));
192 __ lw(t5, MemOperand(a3));
255 __ lw(t0, FieldMemOperand(a2, JSObject::kElementsOffset));
261 __ lw(t1, FieldMemOperand(t0, FixedArray::kLengthOffset));
299 __ lw(a1, MemOperand(t0));
308 __ lw(a0, MemOperand(t0, -12));
364 __ lw(result, FieldMemOperand(string, HeapObject::kMapOffset));
379 __ lw(result, FieldMemOperand(string, SlicedString::kOffsetOffset));
380 __ lw(string, FieldMemOperand(string, SlicedString::kParentOffset))
[all...] |
| macro-assembler-mips.cc | 56 lw(destination, MemOperand(s6, index << kPointerSizeLog2));
65 lw(destination, MemOperand(s6, index << kPointerSizeLog2));
90 lw(result, FieldMemOperand(result, JSGlobalPropertyCell::kValueOffset));
151 lw(dst, SafepointRegisterSlot(src));
256 lw(at, MemOperand(address));
316 lw(scratch, MemOperand(t8));
357 lw(scratch, MemOperand(fp, StandardFrameConstants::kContextOffset));
366 lw(scratch, FieldMemOperand(scratch, offset));
367 lw(scratch, FieldMemOperand(scratch, GlobalObject::kGlobalContextOffset));
374 lw(holder_reg, FieldMemOperand(scratch, HeapObject::kMapOffset))
[all...] |
| lithium-codegen-mips.cc | 197 __ lw(a0, MemOperand(fp, parameter_offset));
312 __ lw(scratch, ToMemOperand(op));
846 __ lw(a0, MemOperand(sp, 0));
[all...] |
| deoptimizer-mips.cc | 798 __ lw(a2, MemOperand(sp, kSavedRegistersAreaSize));
822 __ lw(a0, MemOperand(fp, JavaScriptFrameConstants::kFunctionOffset));
[all...] |
| /external/openssl/crypto/sha/asm/ |
| sha1-mips.s | 30 lw $1,0($4)
31 lw $2,4($4)
32 lw $3,8($4)
33 lw $7,12($4)
35 lw $24,16($4)
1615 lw $8,0($4)
1618 lw $9,4($4)
1621 lw $10,8($4)
1624 lw $11,12($4)
1627 lw $12,16($4
[all...] |
| sha1-mips.pl | 35 # - on O32 populate $a4-$a7 with 'lw $aN,4*N($sp)' if necessary;
58 $REG_L="lw";
189 lw @X[0],0($ctx)
192 lw @X[1],4($ctx)
195 lw @X[2],8($ctx)
198 lw @X[3],12($ctx)
201 lw @X[4],16($ctx)
278 lw $A,0($ctx)
279 lw $B,4($ctx)
280 lw $C,8($ctx
[all...] |
| /dalvik/vm/mterp/mips/ |
| OP_EXECUTE_INLINE_RANGE.S | 25 lw gp, STACK_OFFSET_GP(sp) # restore gp
62 lw t9, 0(t1)
84 lw gp, STACK_OFFSET_GP(sp) # restore gp
|
| OP_FILLED_NEW_ARRAY.S | 68 lw a3, 0(a2) # a3 <- *a2++
95 lw a0, offThread_retval(rSELF) # a0 <- object
96 lw a1, (offThread_retval+4)(rSELF) # a1 <- type
99 lw a2, offThread_cardTable(rSELF) # a2 <- card table base
|
| OP_IPUT_OBJECT_QUICK.S | 15 lw a2, offThread_cardTable(rSELF) # a2 <- card table base
|
| OP_SPUT_OBJECT_JUMBO.S | 47 lw a2, offThread_cardTable(rSELF) # a2 <- card table base
48 lw t1, offField_clazz(a0) # t1 <- field->clazz
|
| OP_INVOKE_DIRECT.S | 29 lw a3, offThread_method(rSELF) # a3 <- self->method
|
| OP_INVOKE_DIRECT_JUMBO.S | 30 lw a3, offThread_method(rSELF) # a3 <- self->method
|
| OP_INVOKE_OBJECT_INIT_RANGE.S | 42 lw a1, offThread_mainHandlerTable(rSELF)
|
| /dalvik/vm/compiler/template/mips/ |
| TEMPLATE_SAVE_STATE.S | 28 lw a1, 0(sp) # recover a0 value
30 lw a1, 4(sp) # recover a1 value
102 lw a1, 0(sp) # recover a0 value
103 lw a1, 4(sp) # recover a1 value
|
| header.S | 144 #define LOAD_PC_FROM_SELF() lw rPC, offThread_pc(rSELF)
146 #define LOAD_FP_FROM_SELF() lw rFP, offThread_curFrame(rSELF)
185 #define LOAD(rd, rbase) lw rd, 0(rbase)
218 #define LOAD_rSELF_OFF(rd,off) lw rd, offThread_##off##(rSELF)
254 .set noat; lw rd, 0(AT); .set at
259 #define LOAD_RB_OFF(rd,rbase,off) lw rd, off(rbase)
267 #define LOAD64_off(rlo,rhi,rbase,off) lw rlo, off(rbase); \
268 lw rhi, (off+4)(rbase)
278 #define LOAD64_off(rlo,rhi,rbase,off) lw rlo, (off+4)(rbase); \
279 lw rhi, (off)(rbase
[all...] |
| /dalvik/vm/mterp/out/ |
| InterpAsm-mips.S | 67 #define LOAD_PC_FROM_SELF() lw rPC, offThread_pc(rSELF)
69 #define LOAD_FP_FROM_SELF() lw rFP, offThread_curFrame(rSELF)
155 #define LOAD_rSELF_OFF(rd, off) lw rd, offThread_##off## (rSELF)
190 .set noat; lw rd, 0(AT); .set at
195 #define LOAD_RB_OFF(rd, rbase, off) lw rd, off(rbase)
203 #define LOAD64_off(rlo, rhi, rbase, off) lw rlo, off(rbase); \
204 lw rhi, (off+4)(rbase)
208 #define vLOAD64_off(rlo, rhi, rbase, off) lw rlo, off(rbase); \
209 lw rhi, (off+4)(rbase)
219 #define LOAD64_off(rlo, rhi, rbase, off) lw rlo, (off+4)(rbase);
[all...] |
| /bionic/libc/kernel/arch-mips/asm/ |
| asm.h | 92 #define REG_L lw
114 #define INT_L lw
154 #define LONG_L lw
204 #define PTR_L lw
|
| /development/ndk/platforms/android-9/arch-mips/include/asm/ |
| asm.h | 92 #define REG_L lw
114 #define INT_L lw
154 #define LONG_L lw
204 #define PTR_L lw
|
| /prebuilts/ndk/8/platforms/android-14/arch-mips/usr/include/asm/ |
| asm.h | 92 #define REG_L lw
114 #define INT_L lw
154 #define LONG_L lw
204 #define PTR_L lw
|
| /prebuilts/ndk/8/platforms/android-9/arch-mips/usr/include/asm/ |
| asm.h | 92 #define REG_L lw
114 #define INT_L lw
154 #define LONG_L lw
204 #define PTR_L lw
|
| /external/v8/test/cctest/ |
| test-assembler-mips.cc | 427 __ lw(t0, MemOperand(a0, OFFSET_OF(T, i)) );
428 __ lw(t1, MemOperand(a0, OFFSET_OF(T, j)) );
497 __ lw(t0, MemOperand(a0, OFFSET_OF(T, ui)) );
656 __ lw(t0, MemOperand(a0, OFFSET_OF(T, input)) );
802 __ lw(t0, MemOperand(a0, OFFSET_OF(T, b_long_lo)));
803 __ lw(t1, MemOperand(a0, OFFSET_OF(T, b_long_hi)));
866 __ lw(t0, MemOperand(a0, OFFSET_OF(T, reg_init)) );
870 __ lw(t1, MemOperand(a0, OFFSET_OF(T, reg_init)) );
874 __ lw(t2, MemOperand(a0, OFFSET_OF(T, reg_init)) );
878 __ lw(t3, MemOperand(a0, OFFSET_OF(T, reg_init)) )
[all...] |
| /external/libvpx/vpx_scale/generic/ |
| bicubic_scaler.c | 492 int h, w, lw, lh; local
546 lw = l_w[w];
548 temp_sum = c_w[phase_offset_w*4] * hbuf[lw - 1];
549 temp_sum += c_w[phase_offset_w*4+1] * hbuf[lw];
550 temp_sum += c_w[phase_offset_w*4+2] * hbuf[lw + 1];
551 temp_sum += c_w[phase_offset_w*4+3] * hbuf[lw + 2];
558 if ((lw + 2) >= in_width)
559 temp_sum = hbuf[lw];
561 if (lw == 0)
|
| /external/openssl/crypto/aes/asm/ |
| aes-mips.pl | 40 # - on O32 populate $a4-$a7 with 'lw $aN,4*N($sp)' if necessary;
63 $REG_L="lw";
116 lw $t0,0($key)
117 lw $t1,4($key)
118 lw $t2,8($key)
119 lw $t3,12($key)
120 lw $cnt,240($key)
209 lw $t4,0($i0) # Te0[s0>>24]
210 lw $t5,0($i1) # Te0[s1>>24]
211 lw $t6,0($i2) # Te0[s2>>24
[all...] |
| /external/kernel-headers/original/asm-mips/ |
| asm.h | 239 #define REG_L lw
260 #define INT_L lw
297 #define LONG_L lw
344 #define PTR_L lw
|
| /external/llvm/test/MC/MBlaze/ |
| mblaze_memory.s | 39 # CHECK: lw
42 lw r1, r2, r3
|
